/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 607 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost() 693 { ISD::UINT_TO_FP, MVT::f32, MVT::i1, 2 }, in getCastInstrCost() 695 { ISD::UINT_TO_FP, MVT::f64, MVT::i1, 2 }, in getCastInstrCost() 697 { ISD::UINT_TO_FP, MVT::f32, MVT::i8, 2 }, in getCastInstrCost() 699 { ISD::UINT_TO_FP, MVT::f64, MVT::i8, 2 }, in getCastInstrCost() 701 { ISD::UINT_TO_FP, MVT::f32, MVT::i16, 2 }, in getCastInstrCost() 703 { ISD::UINT_TO_FP, MVT::f64, MVT::i16, 2 }, in getCastInstrCost() 705 { ISD::UINT_TO_FP, MVT::f32, MVT::i32, 2 }, in getCastInstrCost() 707 { ISD::UINT_TO_FP, MVT::f64, MVT::i32, 2 }, in getCastInstrCost() 709 { ISD::UINT_TO_FP, MVT::f32, MVT::i64, 10 }, in getCastInstrCost() [all …]
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H A D | ARMISelLowering.cpp | 174 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in addTypeForNEON() 179 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON() 309 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addMVEVectorTypes() 909 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering() 910 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom); in ARMTargetLowering() 1035 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering() 5697 case ISD::UINT_TO_FP: in LowerVectorINT_TO_FP() 5699 Opc = ISD::UINT_TO_FP; in LowerVectorINT_TO_FP() 9861 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG); in LowerOperation() 14402 Ext->use_begin()->getOpcode() == ISD::UINT_TO_FP)) in PerformExtractEltToVMOVRRD() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 1883 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 7 }, in getCastInstrCost() 1884 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i1, 7 }, in getCastInstrCost() 1885 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 }, in getCastInstrCost() 1886 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 2 }, in getCastInstrCost() 1887 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i8, 2 }, in getCastInstrCost() 1888 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 }, in getCastInstrCost() 1889 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost() 1890 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i16, 2 }, in getCastInstrCost() 1995 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost() 1999 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 5 }, in getCastInstrCost() [all …]
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H A D | X86IntrinsicsInfo.h | 918 X86_INTRINSIC_DATA(avx512_uitofp_round, INTR_TYPE_1OP, ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 665 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost() 666 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost() 667 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost() 673 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost() 674 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost() 675 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost() 680 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost() 681 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost() 687 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost() 697 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() [all …]
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H A D | AArch64ISelLowering.cpp | 461 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in AArch64TargetLowering() 462 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering() 463 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering() 882 setTargetDAGCombine(ISD::UINT_TO_FP); in AArch64TargetLowering() 986 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand); in AArch64TargetLowering() 1002 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); in AArch64TargetLowering() 1130 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in AArch64TargetLowering() 1190 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in AArch64TargetLowering() 4602 case ISD::UINT_TO_FP: in LowerOperation() 12480 (Opc != ISD::SINT_TO_FP && Opc != ISD::UINT_TO_FP)) in performFDivCombine() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
H A D | ConstrainedOps.def | 59 DAG_INSTRUCTION(UIToFP, 1, 1, experimental_constrained_uitofp, UINT_TO_FP)
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 730 UINT_TO_FP, enumerator
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 476 case ISD::UINT_TO_FP: in LegalizeOp() 576 case ISD::UINT_TO_FP: in Promote() 648 unsigned Opc = (Node->getOpcode() == ISD::UINT_TO_FP || in PromoteINT_TO_FP() 763 case ISD::UINT_TO_FP: in Expand()
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H A D | LegalizeDAG.cpp | 1002 case ISD::UINT_TO_FP: in LegalizeOp() 2519 unsigned UIntOp = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP; in PromoteLegalINT_TO_FP() 2919 case ISD::UINT_TO_FP: in ExpandNode() 4165 case ISD::UINT_TO_FP: { in ConvertNodeToLibcall() 4375 if (Node->getOpcode() == ISD::UINT_TO_FP || in PromoteNode() 4450 case ISD::UINT_TO_FP: in PromoteNode()
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H A D | SelectionDAGDumper.cpp | 348 case ISD::UINT_TO_FP: return "uint_to_fp"; in getOperationName()
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H A D | LegalizeFloatTypes.cpp | 134 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; in SoftenFloatResult() 1245 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; in ExpandFloatResult() 2269 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break; in PromoteFloatResult() 2632 case ISD::UINT_TO_FP: R = SoftPromoteHalfRes_XINT_TO_FP(N); break; in SoftPromoteHalfResult()
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H A D | LegalizeVectorTypes.cpp | 105 case ISD::UINT_TO_FP: in ScalarizeVectorResult() 613 case ISD::UINT_TO_FP: in ScalarizeVectorOperand() 998 case ISD::UINT_TO_FP: in SplitVectorResult() 2184 case ISD::UINT_TO_FP: in SplitVectorOperand() 3096 case ISD::UINT_TO_FP: in WidenVectorResult() 4556 case ISD::UINT_TO_FP: in WidenVectorOperand()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 154 setTargetDAGCombine(ISD::UINT_TO_FP); in WebAssemblyTargetLowering() 221 {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}) in WebAssemblyTargetLowering() 2135 if (N->getOpcode() == ISD::SINT_TO_FP || N->getOpcode() == ISD::UINT_TO_FP) { in performVectorConvertLowCombine() 2169 IntToFP.getOpcode() != ISD::UINT_TO_FP) in performVectorConvertLowCombine() 2246 case ISD::UINT_TO_FP: in PerformDAGCombine()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 398 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AMDGPUTargetLowering() 435 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in AMDGPUTargetLowering() 1258 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG); in LowerOperation() 1679 ISD::NodeType ToFp = Sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP; in LowerDIVREM24() 1814 SDValue Cvt_Lo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Lo); in LowerUDIVREM64() 1815 SDValue Cvt_Hi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Hi); in LowerUDIVREM64() 2496 SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, in LowerINT_TO_FP64() 2499 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64() 2521 return DAG.getNode(ISD::UINT_TO_FP, DL, DestVT, Ext); in LowerUINT_TO_FP()
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H A D | R600ISelLowering.cpp | 1762 if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) { in PerformDAGCombine() 1763 return DAG.getNode(ISD::UINT_TO_FP, DL, N->getValueType(0), in PerformDAGCombine()
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H A D | SIISelLowering.cpp | 552 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Custom); in SITargetLowering() 557 setOperationAction(ISD::UINT_TO_FP, MVT::f16, Promote); in SITargetLowering() 817 setTargetDAGCombine(ISD::UINT_TO_FP); in SITargetLowering() 9359 case ISD::UINT_TO_FP: in fp16SrcZerosHighBits() 9490 if (VT == MVT::f32 && (N0.getOpcode() == ISD::UINT_TO_FP || in performRcpCombine() 10890 case ISD::UINT_TO_FP: in PerformDAGCombine()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 240 AddPromotedToType(ISD::UINT_TO_FP, MVT::i1, in PPCTargetLowering() 260 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom); in PPCTargetLowering() 486 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); in PPCTargetLowering() 500 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in PPCTargetLowering() 1312 setTargetDAGCombine(ISD::UINT_TO_FP); in PPCTargetLowering() 8254 UI->getOpcode() != ISD::UINT_TO_FP && in directMoveIsProfitable() 10820 case ISD::UINT_TO_FP: in LowerOperation() 14001 FirstInput.getOpcode() != ISD::UINT_TO_FP) in DAGCombineBuildVector() 14004 N->getOperand(1).getOpcode() != ISD::UINT_TO_FP) in DAGCombineBuildVector() 14043 N->getOpcode() == ISD::UINT_TO_FP) && in combineFPToIntToFP() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 206 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); // use i64 in initSPUActions() 208 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in initSPUActions() 2486 case ISD::UINT_TO_FP: in isI32Insn()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 268 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); in SystemZTargetLowering() 269 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in SystemZTargetLowering() 413 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal); in SystemZTargetLowering() 414 setOperationAction(ISD::UINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering() 433 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); in SystemZTargetLowering() 434 setOperationAction(ISD::UINT_TO_FP, MVT::v4f32, Legal); in SystemZTargetLowering() 651 setTargetDAGCombine(ISD::UINT_TO_FP); in SystemZTargetLowering() 6356 (Opcode == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND); in combineINT_TO_FP() 6719 case ISD::UINT_TO_FP: return combineINT_TO_FP(N, DCI); in PerformDAGCombine()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1519 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering() 1521 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in SparcTargetLowering() 3032 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG, *this, in LowerOperation() 3379 case ISD::UINT_TO_FP: in ReplaceNodeResults()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1770 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering() 1771 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering() 1772 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 485 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in RISCVTargetLowering() 704 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in RISCVTargetLowering() 2183 case ISD::UINT_TO_FP: { in LowerOperation() 2207 unsigned ExtOpcode = Op.getOpcode() == ISD::UINT_TO_FP in LowerOperation() 2260 case ISD::UINT_TO_FP: in LowerOperation()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1785 case UIToFP: return ISD::UINT_TO_FP; in InstructionOpcodeToISD()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 359 setOperationAction(ISD::UINT_TO_FP, Ty, Legal); in addMSAIntType() 1871 return DAG.getNode(ISD::UINT_TO_FP, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
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