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/netbsd/external/gpl3/gdb/dist/gas/testsuite/gas/arm/
H A Dvfpv3-d16-bad.l2 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fcpyd d3,d22'
4 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fcvtds d22,s22'
6 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fmdhr d21,r4'
8 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fmrdh r6,d23'
10 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fsitod d22,s22'
12 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `ftosid s20,d20'
14 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `ftouid s19,d19'
22 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fabsd d12,d18'
24 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fnegd d12,d18'
46 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fcmpd d3,d18'
[all …]
H A Dvfma1.s6 .inst 0xee000a00 @ VFP vmla.f32 s0,s0,s0
7 .inst 0xee000b00 @ VFP vmla.f64 d0,d0,d0
12 .inst 0xeea00a00 @ VFP vfma.f32 s0,s0,s0
13 .inst 0xeea00b00 @ VFP vfma.f64 d0,d0,d0
18 .inst 0xee000a40 @ VFP vmls.F32 s0,s0,s0
19 .inst 0xee000b40 @ VFP vmls.F64 d0,d0,d0
24 .inst 0xeea00a40 @ VFP vfms.F32 s0,s0,s0
25 .inst 0xeea00b40 @ VFP vfms.F64 d0,d0,d0
30 .inst 0xee100a40 @ VFP vnmla.F32 s0,s0,s0
31 .inst 0xee100b40 @ VFP vnmla.F64 d0,d0,d0
[all …]
H A Darchv8m_1m-cmse-main.s12 vscclrm {s30, VPR} @ Accept single-precision VFP register and VPR together
13 vscclrm {d14, VPR} @ Likewise for double-precision VFP register
14 vscclrm {s1-s4, VPR} @ Accept range of single-precision VFP registers
16 vscclrm {d1-d4, VPR} @ Likewise for double-precision VFP registers
17 vscclrm {s0-s31, VPR} @ Accept all single-precision VFP registers and VPR
19 vscclrm {d0-d15, VPR} @ Likewise for double-precision VFP registers
H A Dvfp1.s1 @ VFP Instructions for D variants (Double precision)
69 @ ARM from VFP operations
74 @ VFP From ARM operations
136 @ Move to VFP from ARM
149 @ Move to ARM from VFP
208 @ On VFP this is always at the end of the instruction.
270 @ ARM from VFP operations
275 @ VFP From ARM operations
H A Dvfp1_t2.s1 @ VFP Instructions for D variants (Double precision)
72 @ ARM from VFP operations
77 @ VFP From ARM operations
139 @ Move to VFP from ARM
152 @ Move to ARM from VFP
211 @ On VFP this is always at the end of the instruction.
283 @ ARM from VFP operations
289 @ VFP From ARM operations
H A Dvfp1xD_t2.s1 @ VFP Instructions for v1xD variants (Single precision only)
85 @ ARM from VFP operations
92 @ VFP From ARM operations
157 @ Move to VFP from ARM
170 @ Move to ARM from VFP
257 @ On VFP this is always at the end of the instruction.
346 @ ARM from VFP operations
351 @ VFP From ARM operations
H A Dvfp1xD.s1 @ VFP Instructions for v1xD variants (Single precision only)
82 @ ARM from VFP operations
89 @ VFP From ARM operations
154 @ Move to VFP from ARM
167 @ Move to ARM from VFP
254 @ On VFP this is always at the end of the instruction.
330 @ ARM from VFP operations
335 @ VFP From ARM operations
H A Dbfloat16-bad.l41 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat.bf16 q1…
43 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat.bf16 q0…
45 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vcvt.bf16.f32…
97 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtt.bf16.f32 s32,s32'
105 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtb.bf16.f32 s32,s32'
H A Dbfloat16-thumb-bad.l26 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vcvtne\.bf16\…
40 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat\.bf16 q…
42 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat\.bf16 q…
96 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtt\.bf16\.f32 s0,s32'
104 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtb\.bf16\.f32 s0,s32'
H A Dvfp-neon-overlap.s1 @ VFP/Neon overlapping instructions
12 @ the 'x' versions should disassemble as VFP instructions, because
H A Darmv8_3-a-fp-bad.l3 [^:]+:4: Error: VFP single precision register expected -- `vjcvt\.s32\.f64 r0,d1'
5 [^:]+:6: Error: VFP/Neon double precision register expected -- `vjcvt\.s32\.f32 s0,s1'
/netbsd/external/gpl3/gdb.old/dist/gas/testsuite/gas/arm/
H A Dvfpv3-d16-bad.l2 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fcpyd d3,d22'
4 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fcvtds d22,s22'
6 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fmdhr d21,r4'
8 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fmrdh r6,d23'
10 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fsitod d22,s22'
12 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `ftosid s20,d20'
14 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `ftouid s19,d19'
22 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fabsd d12,d18'
24 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fnegd d12,d18'
46 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fcmpd d3,d18'
[all …]
H A Dvfma1.s6 .inst 0xee000a00 @ VFP vmla.f32 s0,s0,s0
7 .inst 0xee000b00 @ VFP vmla.f64 d0,d0,d0
12 .inst 0xeea00a00 @ VFP vfma.f32 s0,s0,s0
13 .inst 0xeea00b00 @ VFP vfma.f64 d0,d0,d0
18 .inst 0xee000a40 @ VFP vmls.F32 s0,s0,s0
19 .inst 0xee000b40 @ VFP vmls.F64 d0,d0,d0
24 .inst 0xeea00a40 @ VFP vfms.F32 s0,s0,s0
25 .inst 0xeea00b40 @ VFP vfms.F64 d0,d0,d0
30 .inst 0xee100a40 @ VFP vnmla.F32 s0,s0,s0
31 .inst 0xee100b40 @ VFP vnmla.F64 d0,d0,d0
[all …]
H A Darchv8m_1m-cmse-main.s12 vscclrm {s30, VPR} @ Accept single-precision VFP register and VPR together
13 vscclrm {d14, VPR} @ Likewise for double-precision VFP register
14 vscclrm {s1-s4, VPR} @ Accept range of single-precision VFP registers
16 vscclrm {d1-d4, VPR} @ Likewise for double-precision VFP registers
17 vscclrm {s0-s31, VPR} @ Accept all single-precision VFP registers and VPR
19 vscclrm {d0-d15, VPR} @ Likewise for double-precision VFP registers
H A Dvfp1.s1 @ VFP Instructions for D variants (Double precision)
69 @ ARM from VFP operations
74 @ VFP From ARM operations
136 @ Move to VFP from ARM
149 @ Move to ARM from VFP
208 @ On VFP this is always at the end of the instruction.
270 @ ARM from VFP operations
275 @ VFP From ARM operations
H A Dvfp1_t2.s1 @ VFP Instructions for D variants (Double precision)
72 @ ARM from VFP operations
77 @ VFP From ARM operations
139 @ Move to VFP from ARM
152 @ Move to ARM from VFP
211 @ On VFP this is always at the end of the instruction.
283 @ ARM from VFP operations
289 @ VFP From ARM operations
H A Dvfp1xD_t2.s1 @ VFP Instructions for v1xD variants (Single precision only)
85 @ ARM from VFP operations
92 @ VFP From ARM operations
157 @ Move to VFP from ARM
170 @ Move to ARM from VFP
257 @ On VFP this is always at the end of the instruction.
346 @ ARM from VFP operations
351 @ VFP From ARM operations
H A Dvfp1xD.s1 @ VFP Instructions for v1xD variants (Single precision only)
82 @ ARM from VFP operations
89 @ VFP From ARM operations
154 @ Move to VFP from ARM
167 @ Move to ARM from VFP
254 @ On VFP this is always at the end of the instruction.
330 @ ARM from VFP operations
335 @ VFP From ARM operations
H A Dbfloat16-bad.l41 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat.bf16 q1…
43 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat.bf16 q0…
45 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vcvt.bf16.f32…
97 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtt.bf16.f32 s32,s32'
105 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtb.bf16.f32 s32,s32'
H A Dbfloat16-thumb-bad.l26 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vcvtne\.bf16\…
40 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat\.bf16 q…
42 [^ :]+:[0-9]+: Error: VFP single, double or Neon quad precision register expected -- `vfmat\.bf16 q…
96 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtt\.bf16\.f32 s0,s32'
104 [^ :]+:[0-9]+: Error: VFP single or double precision register expected -- `vcvtb\.bf16\.f32 s0,s32'
H A Dvfp-neon-overlap.s1 @ VFP/Neon overlapping instructions
12 @ the 'x' versions should disassemble as VFP instructions, because
H A Darmv8_3-a-fp-bad.l3 [^:]+:4: Error: VFP single precision register expected -- `vjcvt\.s32\.f64 r0,d1'
5 [^:]+:6: Error: VFP/Neon double precision register expected -- `vjcvt\.s32\.f32 s0,s1'
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMInstrVFP.td163 // Some single precision VFP instructions may be executed on both NEON and VFP
198 // Some single precision VFP instructions may be executed on both NEON and VFP
267 // VFP pipelines.
280 // VFP pipelines.
293 // VFP pipelines.
417 // VFP pipelines on A8.
442 // VFP pipelines on A8.
2185 // VFP pipelines.
2237 // VFP pipelines.
2289 // VFP pipelines.
[all …]
/netbsd/common/lib/libc/arch/arm/string/
H A Dmemset_arm.S37 #elif defined(VFP)
94 #elif defined(VFP)
114 #if !defined(NEON) && !defined(VFP)
130 #if !defined(NEON) && !defined(VFP)
/netbsd/external/gpl3/gcc.old/dist/gcc/config/arm/
H A Dcortex-a9.md3 ;; Originally written by CodeSourcery for VFP.
7 ;; VFP Pipeline description rewritten and contributed by ARM Ltd.
34 ;; 5. 1 VFP and an optional Neon unit.
35 ;; The Load/Store, VFP and Neon issue pipeline are multiplexed.
75 ;; the VFP / Neon pipeline is not possible.
207 ;; Pipelining for VFP instructions.
208 ;; Issue happens either along load store unit or the VFP / Neon unit.

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