Searched refs:VR4102_MGIUINT_L_REG_W (Results 1 – 2 of 2) sorted by relevance
157 #define VR4102_MGIUINT_L_REG_W 0x014 /* Level2 Mask GIU intr reg Low */ macro165 #define MGIUINT_L_REG_W VR4102_MGIUINT_L_REG_W
72 VR4102_GIUINT_L_REG_W,VR4102_MGIUINT_L_REG_W,