Home
last modified time | relevance | path

Searched refs:WD_DEBUG_REG3__dma_zero_indices_p0_q__SHIFT (Results 1 – 3 of 3) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h16150 #define WD_DEBUG_REG3__dma_zero_indices_p0_q__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h18882 #define WD_DEBUG_REG3__dma_zero_indices_p0_q__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h18292 #define WD_DEBUG_REG3__dma_zero_indices_p0_q__SHIFT 0xa macro