Searched refs:WREG32_UVD_CTX (Results 1 – 8 of 8) sorted by relevance
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | amdgpu_uvd_v4_2.c | 308 WREG32_UVD_CTX(ixUVD_LMI_CACHE_CTRL, tmp & (~0x10)); in uvd_v4_2_start() 589 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg() 598 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg() 631 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
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H A D | amdgpu_uvd_v5_0.c | 749 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v5_0_enable_mgcg() 758 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v5_0_enable_mgcg()
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H A D | amdgpu_cgs.c | 105 return WREG32_UVD_CTX(index, value); in amdgpu_cgs_write_ind_register()
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H A D | amdgpu_uvd_v6_0.c | 1407 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v6_0_enable_mgcg() 1416 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v6_0_enable_mgcg()
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H A D | amdgpu.h | 1066 #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v)) macro
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/netbsd/sys/external/bsd/drm2/dist/drm/radeon/ |
H A D | radeon_si.c | 5196 WREG32_UVD_CTX(UVD_CGC_CTRL2, tmp2); in si_set_uvd_dcm() 5466 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg() 5478 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg()
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H A D | radeon.h | 2617 #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v)) macro
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H A D | radeon_cik.c | 6238 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg() 6247 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg()
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