Searched refs:_CHV_CMN_DW5_CH0 (Results 1 – 2 of 2) sorted by relevance
| /netbsd/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_dpio_phy.c | 815 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_phy_pre_pll_enable()
821 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_phy_pre_pll_enable()
968 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_phy_post_pll_disable()
970 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_phy_post_pll_disable()
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | i915_reg.h | 1658 #define _CHV_CMN_DW5_CH0 0x8114 macro
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