/netbsd/sys/dev/pci/ |
H A D | if_ixlvar.h | 444 uint32_t addr_lo; member 453 uint32_t addr_lo; member 472 uint32_t addr_lo; member 492 uint32_t addr_lo; member 786 uint32_t addr_lo; member 797 uint32_t addr_lo; member 818 uint32_t addr_lo; member
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H A D | if_jme.c | 703 sc->jme_rxring[i].addr_lo = in jme_add_rxbuf() 1479 desc->addr_lo = 0; in jme_encap() 1490 desc->addr_lo = htole32( in jme_encap() 1546 desc->flags, desc->buflen, desc->addr_hi, desc->addr_lo); in jme_txeof()
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H A D | if_jmereg.h | 917 uint32_t addr_lo; member
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/netbsd/sys/dev/pci/cxgb/ |
H A D | cxgb_mc5.c | 132 static int mc5_write(adapter_t *adapter, u32 addr_lo, u32 cmd) in mc5_write() argument 134 t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_ADDR0, addr_lo); in mc5_write() 137 CH_ERR(adapter, "MC5 timeout writing to TCAM address 0x%x\n", addr_lo); in mc5_write()
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H A D | cxgb_xgmac.c | 229 u32 addr_lo, addr_hi; in set_addr_filter() local 232 addr_lo = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; in set_addr_filter() 235 t3_write_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1 + oft, addr_lo); in set_addr_filter()
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H A D | cxgb_sge.c | 98 uint32_t addr_lo; member 499 d->addr_lo = htobe32(sd->map->dm_segs[0].ds_addr & 0xffffffff); in refill_fl() 572 to->addr_lo = from->addr_lo; // already big endian in recycle_rx_buf()
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/netbsd/external/gpl3/gdb/dist/sim/bfin/ |
H A D | dv-bfin_mmu.c | 482 bu32 addr_lo, addr_hi; in _mmu_check_addr() local 489 addr_lo = cplb_addr[i]; in _mmu_check_addr() 491 if (addr < addr_lo || addr >= addr_hi) in _mmu_check_addr()
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/netbsd/external/gpl3/gdb.old/dist/sim/bfin/ |
H A D | dv-bfin_mmu.c | 482 bu32 addr_lo, addr_hi; in _mmu_check_addr() local 489 addr_lo = cplb_addr[i]; in _mmu_check_addr() 491 if (addr < addr_lo || addr >= addr_hi) in _mmu_check_addr()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | amdgpu_amdkfd_gfx_v9.h | 55 uint32_t addr_lo);
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H A D | amdgpu_amdkfd_gfx_v7.c | 610 uint32_t addr_lo) in kgd_address_watch_execute() argument 626 ADDRESS_WATCH_REG_ADDR_LO], addr_lo); in kgd_address_watch_execute()
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/netbsd/sys/external/bsd/drm2/dist/drm/via/ |
H A D | via_dma.c | 497 uint32_t cmd_addr, addr_lo, addr_hi; in via_align_cmd() local 513 addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | in via_align_cmd() 518 VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, *cmd_addr_lo = addr_lo); in via_align_cmd()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/ |
H A D | kgd_kfd_interface.h | 297 uint32_t addr_lo);
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
H A D | kfd_pm4_headers_vi.h | 319 uint32_t addr_lo; member
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H A D | kfd_pm4_headers_ai.h | 361 uint32_t addr_lo; member
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H A D | kfd_packet_manager_v9.c | 309 packet->addr_lo = lower_32_bits((uint64_t)fence_address); in pm_query_status_v9()
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H A D | kfd_packet_manager_vi.c | 288 packet->addr_lo = lower_32_bits((uint64_t)fence_address); in pm_query_status_vi()
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/netbsd/usr.sbin/fwctl/ |
H A D | fwcontrol.c | 192 read_write_quad(int fd, struct fw_eui64 eui, uint32_t addr_lo, int readmode, in read_write_quad() argument 216 asyreq->pkt.mode.rreqq.dest_lo = addr_lo; in read_write_quad()
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/netbsd/sys/dev/ic/ |
H A D | cissreg.h | 452 u_int32_t addr_lo; member
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/netbsd/sys/external/bsd/drm/dist/shared-core/ |
H A D | radeon_drm.h | 197 unsigned char cmd_type, addr_lo, addr_hi, count; member
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/netbsd/external/gpl3/gcc/dist/gcc/config/tilepro/ |
H A D | tilepro.c | 1594 rtx addr_lo, addr_hi; in tilepro_expand_unaligned_load() local 1649 addr_lo = force_reg (Pmode, plus_constant (Pmode, mema, byte_offset)); in tilepro_expand_unaligned_load() 1651 gen_rtx_AND (Pmode, addr_lo, GEN_INT (-4))); in tilepro_expand_unaligned_load() 1664 addr_lo = make_safe_from (addr_lo, dest_reg); in tilepro_expand_unaligned_load() 1678 gen_lowpart (SImode, hi), addr_lo)); in tilepro_expand_unaligned_load()
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H A D | tilepro.cc | 1594 rtx addr_lo, addr_hi; in tilepro_expand_unaligned_load() local 1649 addr_lo = force_reg (Pmode, plus_constant (Pmode, mema, byte_offset)); in tilepro_expand_unaligned_load() 1651 gen_rtx_AND (Pmode, addr_lo, GEN_INT (-4))); in tilepro_expand_unaligned_load() 1664 addr_lo = make_safe_from (addr_lo, dest_reg); in tilepro_expand_unaligned_load() 1678 gen_lowpart (SImode, hi), addr_lo)); in tilepro_expand_unaligned_load()
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/netbsd/external/gpl3/gcc.old/dist/gcc/config/tilepro/ |
H A D | tilepro.c | 1594 rtx addr_lo, addr_hi; in tilepro_expand_unaligned_load() local 1649 addr_lo = force_reg (Pmode, plus_constant (Pmode, mema, byte_offset)); in tilepro_expand_unaligned_load() 1651 gen_rtx_AND (Pmode, addr_lo, GEN_INT (-4))); in tilepro_expand_unaligned_load() 1664 addr_lo = make_safe_from (addr_lo, dest_reg); in tilepro_expand_unaligned_load() 1678 gen_lowpart (SImode, hi), addr_lo)); in tilepro_expand_unaligned_load()
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/netbsd/external/gpl3/gcc/dist/gcc/config/tilegx/ |
H A D | tilegx.c | 1853 rtx addr_lo, addr_hi; in tilegx_expand_unaligned_load() local 1917 addr_lo = force_reg (Pmode, plus_constant (Pmode, mema, byte_offset)); in tilegx_expand_unaligned_load() 1919 gen_rtx_AND (GET_MODE (mema), addr_lo, in tilegx_expand_unaligned_load() 1934 addr_lo = make_safe_from (addr_lo, dest_reg); in tilegx_expand_unaligned_load() 1949 gen_lowpart (DImode, hi), addr_lo)); in tilegx_expand_unaligned_load()
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H A D | tilegx.cc | 1854 rtx addr_lo, addr_hi; in tilegx_expand_unaligned_load() local 1918 addr_lo = force_reg (Pmode, plus_constant (Pmode, mema, byte_offset)); in tilegx_expand_unaligned_load() 1920 gen_rtx_AND (GET_MODE (mema), addr_lo, in tilegx_expand_unaligned_load() 1935 addr_lo = make_safe_from (addr_lo, dest_reg); in tilegx_expand_unaligned_load() 1950 gen_lowpart (DImode, hi), addr_lo)); in tilegx_expand_unaligned_load()
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/netbsd/external/gpl3/gcc.old/dist/gcc/config/tilegx/ |
H A D | tilegx.c | 1853 rtx addr_lo, addr_hi; in tilegx_expand_unaligned_load() local 1917 addr_lo = force_reg (Pmode, plus_constant (Pmode, mema, byte_offset)); in tilegx_expand_unaligned_load() 1919 gen_rtx_AND (GET_MODE (mema), addr_lo, in tilegx_expand_unaligned_load() 1934 addr_lo = make_safe_from (addr_lo, dest_reg); in tilegx_expand_unaligned_load() 1949 gen_lowpart (DImode, hi), addr_lo)); in tilegx_expand_unaligned_load()
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