| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 38 bool areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | LanaiInstrInfo.cpp | 88 bool LanaiInstrInfo::areMemAccessesTriviallyDisjoint( in areMemAccessesTriviallyDisjoint() function in LanaiInstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 100 bool areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | RISCVInstrInfo.cpp | 921 bool RISCVInstrInfo::areMemAccessesTriviallyDisjoint( in areMemAccessesTriviallyDisjoint() function in RISCVInstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 356 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | SystemZInstrInfo.cpp | 1964 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa, in areMemAccessesTriviallyDisjoint() function in SystemZInstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 291 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | HexagonExpandCondsets.cpp | 826 if (HII->areMemAccessesTriviallyDisjoint(TheI, ToI)) in canMoveMemTo()
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| H A D | HexagonInstrInfo.cpp | 1898 bool HexagonInstrInfo::areMemAccessesTriviallyDisjoint( in areMemAccessesTriviallyDisjoint() function in HexagonInstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 58 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | AArch64InstrInfo.cpp | 1053 bool AArch64InstrInfo::areMemAccessesTriviallyDisjoint( in areMemAccessesTriviallyDisjoint() function in AArch64InstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 554 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | PPCInstrInfo.cpp | 5470 bool PPCInstrInfo::areMemAccessesTriviallyDisjoint( in areMemAccessesTriviallyDisjoint() function in PPCInstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1779 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa, in areMemAccessesTriviallyDisjoint() function
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 321 areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
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| H A D | SIInstrInfo.cpp | 2969 bool SIInstrInfo::areMemAccessesTriviallyDisjoint(const MachineInstr &MIa, in areMemAccessesTriviallyDisjoint() function in SIInstrInfo
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 784 assert(TII->areMemAccessesTriviallyDisjoint(LdMI, MI) && in addLoopCarriedDependences()
2208 bool Disjoint = TII->areMemAccessesTriviallyDisjoint(*NewMI, *PrevDef); in canUseLastOffsetValue()
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| H A D | MachineInstr.cpp | 1349 if (TII->areMemAccessesTriviallyDisjoint(*this, Other)) in mayAlias()
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