/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 131 return RBI.constrainGenericRegister(DstReg, *RC, *MRI); in selectCOPY() 188 RBI.constrainGenericRegister(MO.getReg(), *RC, *MRI); in selectCOPY() 228 return RBI.constrainGenericRegister(DefReg, *DefRC, *MRI); in selectPHI() 394 if (!RBI.constrainGenericRegister(DstReg, RC, *MRI)) in selectG_ADD_SUB() 535 if (!RBI.constrainGenericRegister(DstReg, *DstRC, *MRI)) in selectG_MERGE_VALUES() 1194 !RBI.constrainGenericRegister(DstReg, *RC, *MRI)) in selectReturnAddress() 1372 if (!RBI.constrainGenericRegister(BaseOffset, in selectDSGWSIntrinsic() 2481 return RBI.constrainGenericRegister( in selectG_GLOBAL_VALUE() 2822 return RBI.constrainGenericRegister(DstReg, RC, *MRI); in selectG_SHUFFLE_VECTOR() 2829 if (!RBI.constrainGenericRegister(DstReg, RC, *MRI) || in selectG_SHUFFLE_VECTOR() [all …]
|
H A D | AMDGPURegisterBankInfo.cpp | 859 constrainGenericRegister(OpReg, AMDGPU::VGPR_32RegClass, MRI); in executeInWaterfallLoop() 1105 constrainGenericRegister(Reg, AMDGPU::VGPR_32RegClass, MRI); in constrainOpWithReadfirstlane() 1827 return constrainGenericRegister(DstReg, AMDGPU::VGPR_32RegClass, MRI) && in buildVCopy() 1828 constrainGenericRegister(SrcReg, AMDGPU::SReg_32RegClass, MRI); in buildVCopy() 1847 return constrainGenericRegister(SrcReg, AMDGPU::SReg_64RegClass, MRI) && in buildVCopy() 1848 constrainGenericRegister(DstReg, AMDGPU::VReg_64RegClass, MRI); in buildVCopy()
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InstructionSelector.cpp | 299 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy() 696 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTurnIntoCOPY() 697 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTurnIntoCOPY() 759 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTruncOrPtrToInt() 760 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTruncOrPtrToInt() 869 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectAnyext() 870 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectAnyext() 984 RBI.constrainGenericRegister( in selectFCmp() 1176 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in emitExtractSubreg() 1177 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in emitExtractSubreg() [all …]
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 956 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy() 2513 RBI.constrainGenericRegister(I.getOperand(0).getReg(), in select() 2548 RBI.constrainGenericRegister(I.getOperand(2).getReg(), in select() 3153 RBI.constrainGenericRegister(DstReg, *DstRC, MRI); in select() 3624 RBI.constrainGenericRegister(DstReg, *SrcRC, MRI); in selectVectorICmp() 3786 RBI.constrainGenericRegister(*DstReg, *DstRC, MRI); in emitExtractVectorElt() 3806 RBI.constrainGenericRegister(*DstReg, *DstRC, MRI); in emitExtractVectorElt() 3985 RBI.constrainGenericRegister(CopyTo, *RC, MRI); in selectUnmergeValues() 4745 RBI.constrainGenericRegister(DstReg, *RC, MRI); in selectInsertElt() 4789 RBI.constrainGenericRegister( in emitConstantVector() [all …]
|
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | RegisterBankInfo.h | 646 constrainGenericRegister(Register Reg, const TargetRegisterClass &RC,
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsInstructionSelector.cpp | 112 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy() 436 return RBI.constrainGenericRegister(DestReg, *DefRC, MRI); in select()
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 223 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy() 1165 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in select()
|
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | RegisterBankInfo.cpp | 132 const TargetRegisterClass *RegisterBankInfo::constrainGenericRegister( in constrainGenericRegister() function in RegisterBankInfo
|
H A D | Utils.cpp | 42 if (!RBI.constrainGenericRegister(Reg, RegClass, MRI)) in constrainRegToClass()
|