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Searched refs:dclk_table (Results 1 – 13 of 13) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/
H A Darcturus_ppt.h67 struct arcturus_single_dpm_table dclk_table; member
H A Dvega20_ppt.h117 struct vega20_single_dpm_table dclk_table; member
H A Damdgpu_navi10_ppt.c641 dpm_context->dpm_tables.dclk_table.min = driver_ppt->FreqTableDclk[0]; in navi10_set_default_dpm_table()
642 dpm_context->dpm_tables.dclk_table.max = driver_ppt->FreqTableDclk[NUM_DCLK_DPM_LEVELS - 1]; in navi10_set_default_dpm_table()
H A Damdgpu_vega20_ppt.c810 single_dpm_table = &(dpm_table->dclk_table); in vega20_set_default_dpm_table()
2185 dpm_table = &(dpm_ctx->dclk_table); in vega20_apply_clocks_adjust_rules()
/netbsd/sys/external/bsd/drm2/dist/drm/ast/
H A Dast_tables.h84 static const struct ast_vbios_dclk_info dclk_table[] = { variable
H A Dast_mode.c447 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; in ast_set_dclk_reg()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dsmu_v11_0.h106 struct smu_11_0_dpm_table dclk_table; member
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Dvega10_hwmgr.h154 struct vega10_single_dpm_table dclk_table; member
H A Dvega12_hwmgr.h133 struct vega12_single_dpm_table dclk_table; member
H A Dvega20_hwmgr.h185 struct vega20_single_dpm_table dclk_table; member
H A Damdgpu_vega12_hwmgr.c632 dpm_table = &(data->dpm_table.dclk_table); in vega12_setup_default_dpm_tables()
1083 min_freq = data->dpm_table.dclk_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1161 max_freq = data->dpm_table.dclk_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()
2277 dpm_table = &(data->dpm_table.dclk_table); in vega12_apply_clocks_adjust_rules()
H A Damdgpu_vega20_hwmgr.c707 dpm_table = &(data->dpm_table.dclk_table); in vega20_setup_default_dpm_tables()
1840 min_freq = data->dpm_table.dclk_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()
1935 max_freq = data->dpm_table.dclk_table.dpm_state.soft_max_level; in vega20_upload_dpm_max_level()
3757 dpm_table = &(data->dpm_table.dclk_table); in vega20_apply_clocks_adjust_rules()
H A Damdgpu_vega10_hwmgr.c1391 data->dpm_table.dclk_table.count = 0; in vega10_setup_default_dpm_tables()
1406 dpm_table = &(data->dpm_table.dclk_table); in vega10_setup_default_dpm_tables()
2029 &(data->dpm_table.dclk_table); in vega10_populate_smc_uvd_levels()