| /netbsd/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| H A D | intel_gt_pm.c | 36 intel_gt_pm_get(gt); in user_forcewake()
43 intel_gt_pm_put(gt); in user_forcewake()
48 struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref); in __gt_unpark() local
51 GT_TRACE(gt, "\n"); in __gt_unpark()
80 struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref); in __gt_park() local
84 GT_TRACE(gt, "\n"); in __gt_park()
88 i915_vma_parked(gt); in __gt_park()
112 intel_wakeref_init(>->wakeref, gt->uncore->rpm, &wf_ops); in intel_gt_pm_init_early()
193 GT_TRACE(gt, "\n"); in intel_gt_resume()
296 if (is_mock_gt(gt)) in intel_gt_suspend_late()
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| H A D | intel_gt.c | 30 gt->i915 = i915; in intel_gt_init_early()
31 gt->uncore = &i915->uncore; in intel_gt_init_early()
38 intel_gt_init_reset(gt); in intel_gt_init_early()
49 gt->ggtt = ggtt; in intel_gt_init_hw_early()
114 init_unused_rings(gt); in intel_gt_init_hw()
129 intel_mocs_init(gt); in intel_gt_init_hw()
582 err = intel_gt_init_scratch(gt, IS_GEN(gt->i915, 2) ? SZ_256K : SZ_4K); in intel_gt_init()
586 intel_gt_pm_init(gt); in intel_gt_init()
588 gt->vm = kernel_vm(gt); in intel_gt_init()
589 if (!gt->vm) { in intel_gt_init()
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| H A D | intel_gt_irq.c | 153 spin_lock(>->irq_lock); in gen11_gt_irq_handler()
237 gt->pm_ier = 0x0; in gen11_gt_irq_postinstall()
238 gt->pm_imr = ~gt->pm_ier; in gen11_gt_irq_postinstall()
261 gen5_gt_disable_irq(gt, GT_PARITY_ERROR(gt->i915)); in gen7_parity_error_irq_handler()
378 gt->pm_ier = 0x0; in gen8_gt_irq_postinstall()
379 gt->pm_imr = ~gt->pm_ier; in gen8_gt_irq_postinstall()
386 GEN8_IRQ_INIT_NDX(uncore, GT, 2, gt->pm_imr, gt->pm_ier); in gen8_gt_irq_postinstall()
400 intel_uncore_write(gt->uncore, GTIMR, gt->gt_imr); in gen5_gt_update_irq()
429 gt->gt_imr = ~0; in gen5_gt_irq_postinstall()
432 gt->gt_imr = ~GT_PARITY_ERROR(gt->i915); in gen5_gt_irq_postinstall()
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| H A D | intel_reset.c | 749 revoke_mmaps(gt); in gt_revoke()
969 gt_revoke(gt); in do_reset()
1021 GT_TRACE(gt, "flags=%lx\n", gt->reset.flags); in intel_gt_reset()
1074 ret = resume(gt); in intel_gt_reset()
1123 struct intel_gt *gt = engine->gt; in intel_engine_reset() local
1266 if (intel_has_reset_engine(gt) && !intel_gt_is_wedged(gt)) { in intel_gt_handle_error()
1316 DRM_SPIN_WAKEUP_ALL(>->reset.queue, >->reset.lock); in intel_gt_handle_error()
1334 DRM_SPIN_WAIT_UNTIL(ret, >->reset.queue, >->reset.lock, in intel_gt_reset_trylock()
1367 DRM_SPIN_WAIT_UNTIL(ret, >->reset.queue, >->reset.lock, in intel_gt_terminally_wedged()
1418 w->gt = gt; in __intel_init_wedge()
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| H A D | selftest_reset.c | 17 struct intel_gt *gt = arg; in igt_global_reset() local
24 igt_global_reset_lock(gt); in igt_global_reset()
47 struct intel_gt *gt = arg; in igt_wedged_reset() local
55 intel_gt_set_wedged(gt); in igt_wedged_reset()
74 intel_gt_pm_get(gt); in igt_atomic_reset()
101 igt_force_reset(gt); in igt_atomic_reset()
105 intel_gt_pm_put(gt); in igt_atomic_reset()
126 intel_gt_pm_get(gt); in igt_atomic_engine_reset()
159 igt_force_reset(gt); in igt_atomic_engine_reset()
163 intel_gt_pm_put(gt); in igt_atomic_engine_reset()
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| H A D | intel_gt_pm_irq.c | 22 u32 mask = gt->pm_imr; in write_pm_imr()
45 lockdep_assert_held(>->irq_lock); in gen6_gt_pm_update_irq()
47 new_val = gt->pm_imr; in gen6_gt_pm_update_irq()
51 if (new_val != gt->pm_imr) { in gen6_gt_pm_update_irq()
52 gt->pm_imr = new_val; in gen6_gt_pm_update_irq()
53 write_pm_imr(gt); in gen6_gt_pm_update_irq()
83 u32 mask = gt->pm_ier; in write_pm_ier()
102 gt->pm_ier |= enable_mask; in gen6_gt_pm_enable_irq()
103 write_pm_ier(gt); in gen6_gt_pm_enable_irq()
111 gt->pm_ier &= ~disable_mask; in gen6_gt_pm_disable_irq()
[all …]
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| H A D | intel_gt_pm.h | 19 return intel_wakeref_is_active(>->wakeref); in intel_gt_pm_is_awake()
24 intel_wakeref_get(>->wakeref); in intel_gt_pm_get()
29 __intel_wakeref_get(>->wakeref); in __intel_gt_pm_get()
34 return intel_wakeref_get_if_active(>->wakeref); in intel_gt_pm_get_if_awake()
39 intel_wakeref_put(>->wakeref); in intel_gt_pm_put()
44 intel_wakeref_put_async(>->wakeref); in intel_gt_pm_put_async()
52 void intel_gt_pm_init_early(struct intel_gt *gt);
53 void intel_gt_pm_init(struct intel_gt *gt);
54 void intel_gt_pm_fini(struct intel_gt *gt);
57 void intel_gt_suspend_late(struct intel_gt *gt);
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| H A D | selftest_hangcheck.c | 52 struct intel_gt *gt; member
66 h->gt = gt; in hang_init()
140 struct intel_gt *gt = h->gt; in hang_create_request() local
347 err = hang_init(&h, gt); in igt_hang_sanitycheck()
565 err = hang_init(&h, gt); in __igt_reset_engine()
1045 err = hang_init(&h, gt); in igt_reset_wait()
1175 err = hang_init(&h, gt); in __igt_reset_evict_vma()
1306 return __igt_reset_evict_vma(gt, >->ggtt->vm, in igt_reset_evict_ggtt()
1335 return __igt_reset_evict_vma(gt, >->ggtt->vm, in igt_reset_evict_fence()
1670 igt_force_reset(gt); in igt_reset_engines_atomic()
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| H A D | intel_gt.h | 17 #define GT_TRACE(gt, fmt, ...) do { \ argument
18 const struct intel_gt *gt__ __maybe_unused = (gt); \
41 int intel_gt_init(struct intel_gt *gt);
42 void intel_gt_driver_register(struct intel_gt *gt);
44 void intel_gt_driver_unregister(struct intel_gt *gt);
45 void intel_gt_driver_remove(struct intel_gt *gt);
46 void intel_gt_driver_release(struct intel_gt *gt);
54 void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
55 void intel_gt_chipset_flush(struct intel_gt *gt);
60 return i915_ggtt_offset(gt->scratch) + field; in intel_gt_scratch_offset()
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| H A D | intel_reset.h | 24 void intel_gt_init_reset(struct intel_gt *gt);
25 void intel_gt_fini_reset(struct intel_gt *gt);
28 void intel_gt_handle_error(struct intel_gt *gt,
34 void intel_gt_reset(struct intel_gt *gt,
45 void intel_gt_set_wedged(struct intel_gt *gt);
46 bool intel_gt_unset_wedged(struct intel_gt *gt);
47 int intel_gt_terminally_wedged(struct intel_gt *gt);
57 int intel_reset_guc(struct intel_gt *gt);
61 struct intel_gt *gt; member
66 struct intel_gt *gt,
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| H A D | selftest_gt_pm.c | 18 struct intel_gt *gt = arg; in live_gt_resume() local
24 intel_gt_suspend_prepare(gt); in live_gt_resume()
25 intel_gt_suspend_late(gt); in live_gt_resume()
27 if (gt->rc6.enabled) { in live_gt_resume()
29 intel_gt_set_wedged_on_init(gt); in live_gt_resume()
34 err = intel_gt_resume(gt); in live_gt_resume()
38 if (gt->rc6.supported && !gt->rc6.enabled) { in live_gt_resume()
40 intel_gt_set_wedged_on_init(gt); in live_gt_resume()
45 err = st_llc_verify(>->llc); in live_gt_resume()
48 intel_gt_set_wedged_on_init(gt); in live_gt_resume()
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| H A D | intel_gt_irq.h | 24 void gen11_gt_irq_reset(struct intel_gt *gt);
25 void gen11_gt_irq_postinstall(struct intel_gt *gt);
28 bool gen11_gt_reset_one_iir(struct intel_gt *gt,
32 void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
34 void gen5_gt_irq_postinstall(struct intel_gt *gt);
35 void gen5_gt_irq_reset(struct intel_gt *gt);
36 void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
37 void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
39 void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
42 void gen8_gt_irq_reset(struct intel_gt *gt);
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| H A D | intel_gt_requests.c | 37 static bool flush_submission(struct intel_gt *gt) in flush_submission() argument
43 if (!intel_gt_pm_is_awake(gt)) in flush_submission()
46 for_each_engine(engine, gt, id) { in flush_submission()
199 if (!intel_gt_pm_is_awake(gt)) in intel_gt_wait_for_idle()
213 struct intel_gt *gt = in retire_work_handler() local
216 schedule_delayed_work(>->requests.retire_work, in retire_work_handler()
218 intel_gt_retire_requests(gt); in retire_work_handler()
221 void intel_gt_init_requests(struct intel_gt *gt) in intel_gt_init_requests() argument
226 void intel_gt_park_requests(struct intel_gt *gt) in intel_gt_park_requests() argument
228 cancel_delayed_work(>->requests.retire_work); in intel_gt_park_requests()
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| H A D | selftest_rc6.c | 22 struct intel_gt *gt = arg; in live_rc6_manual() local
23 struct intel_rc6 *rc6 = >->rc6; in live_rc6_manual()
37 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
40 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in live_rc6_manual()
112 randomised_engines(struct intel_gt *gt, in randomised_engines() argument
121 for_each_engine(engine, gt, id) in randomised_engines()
131 for_each_engine(engine, gt, id) in randomised_engines()
142 struct intel_gt *gt = arg; in live_rc6_ctx_wa() local
149 if (INTEL_GEN(gt->i915) < 8) in live_rc6_ctx_wa()
184 intel_gt_set_wedged(gt); in live_rc6_ctx_wa()
[all …]
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| H A D | selftest_lrc.c | 78 struct intel_gt *gt = arg; in live_sanitycheck() local
110 intel_gt_set_wedged(gt); in live_sanitycheck()
295 struct intel_gt *gt = arg; in live_hold_reset() local
334 intel_gt_set_wedged(gt); in live_hold_reset()
343 intel_gt_set_wedged(gt); in live_hold_reset()
378 intel_gt_set_wedged(gt); in live_hold_reset()
1191 intel_gt_set_wedged(gt); in live_late_preempt()
1319 intel_gt_set_wedged(gt); in live_nopreempt()
1639 intel_gt_set_wedged(gt); in live_preempt_cancel()
2508 struct intel_gt *gt; member
[all …]
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| H A D | intel_timeline.c | 29 struct intel_gt *gt; member
58 struct intel_gt_timelines *gt = &timeline->gt->timelines; in hwsp_alloc() local
63 spin_lock_irq(>->hwsp_lock); in hwsp_alloc()
71 spin_unlock_irq(>->hwsp_lock); in hwsp_alloc()
77 vma = __hwsp_alloc(timeline->gt); in hwsp_alloc()
84 hwsp->gt = timeline->gt; in hwsp_alloc()
87 hwsp->gt_timelines = gt; in hwsp_alloc()
89 spin_lock_irq(>->hwsp_lock); in hwsp_alloc()
99 spin_unlock_irq(>->hwsp_lock); in hwsp_alloc()
210 struct intel_gt *gt, in intel_timeline_init() argument
[all …]
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| /netbsd/sys/dev/marvell/ |
| H A D | gt.c | 252 gt->sc_model = PCI_PRODUCT(gt_read(gt, GTPCI_CD(0))); in gt_attach_common()
254 gt->sc_rev = PCI_REVISION(gt_read(gt, GTPCI_CD(0))); in gt_attach_common()
302 gt_read(gt, GT_WDOG_Config), gt_read(gt, GT_WDOG_Value)); in gt_attach_common()
305 loaddr = GT_LADDR_GET(gt_read(gt, GT_SCS0_Low_Decode), gt->sc_model); in gt_attach_common()
310 loaddr = GT_LADDR_GET(gt_read(gt, GT_SCS1_Low_Decode), gt->sc_model); in gt_attach_common()
325 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS0_Low_Decode), gt->sc_model); in gt_attach_common()
330 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS1_Low_Decode), gt->sc_model); in gt_attach_common()
335 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS2_Low_Decode), gt->sc_model); in gt_attach_common()
340 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS3_Low_Decode), gt->sc_model); in gt_attach_common()
352 GT_HADDR_GET(gt_read(gt, GT_PCI0_IO_High_Decode), gt->sc_model); in gt_attach_common()
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| /netbsd/usr.sbin/mrouted/ |
| H A D | prune.c | 149 gt = gt->gt_gnext; in find_src_grp()
258 gt->gt_prsent_timer = gt->gt_timer; in send_prune()
385 for (gt = kernel_table; gt; gt = gt->gt_gnext) { in find_grp()
433 for (gt = kernel_table; gt; gt=gt->gt_gnext) { in next_grp_src_mask()
608 for (gt = kernel_no_route; gt; gt = gt->gt_next) in add_table_entry()
669 gt->gt_next->gt_prev = gt; in add_table_entry()
692 gt->gt_gnext->gt_gprev = gt; in add_table_entry()
1557 for (gt = rp->rt_groups; gt; gt = gt->gt_next) { in steal_sources()
1891 for (gt = kernel_no_route; gt; gt = gt->gt_next) { in dump_cache()
1901 for (gt = kernel_table; gt; gt = gt->gt_gnext) { in dump_cache()
[all …]
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| H A D | rsrr.c | 51 #define GET_SCOPE(gt) { \ argument
330 gt = &local_g;
334 gt->gt_grpmems = 0;
335 gt->gt_scope = 0;
348 GET_SCOPE(gt);
349 gt->gt_grpmems &= ~gt->gt_scope;
401 rsrr_cache(gt,route_query) in rsrr_cache() argument
402 struct gtable *gt; in rsrr_cache()
459 struct gtable *gt; in rsrr_cache_send()
484 rsrr_cache_clean(gt) in rsrr_cache_clean() argument
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| /netbsd/sys/arch/prep/pci/ |
| H A D | gten.c | 131 >->gt_memaddr, >->gt_memsize, NULL); in gten_attach()
142 gt->gt_ri = kmem_zalloc(sizeof(*gt->gt_ri), in gten_attach()
164 gt->gt_paddr = vtophys((vaddr_t)gt->gt_ri->ri_bits); in gten_attach()
169 gt->gt_psize = gt->gt_memsize - GTEN_VRAM_OFFSET; in gten_attach()
175 gt->gt_ri->ri_width, gt->gt_ri->ri_height, in gten_attach()
179 gt->gt_ri->ri_cols, gt->gt_ri->ri_rows, in gten_attach()
180 gt->gt_ri->ri_xorigin, gt->gt_ri->ri_yorigin); in gten_attach()
201 gt->gt_cmap_red[0] = gt->gt_cmap_green[0] = gt->gt_cmap_blue[0] = 0; in gten_attach()
202 gt->gt_cmap_red[15] = gt->gt_cmap_red[255] = 0xff; in gten_attach()
203 gt->gt_cmap_green[15] = gt->gt_cmap_green[255] = 0xff; in gten_attach()
[all …]
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | Makefile | 73 gt-y += \
75 gt/debugfs_gt.o \
77 gt/gen6_ppgtt.o \
87 gt/intel_gt.o \
92 gt/intel_gtt.o \
93 gt/intel_llc.o \
94 gt/intel_lrc.o \
97 gt/intel_rc6.o \
102 gt/intel_rps.o \
107 gt-y += \
[all …]
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| H A D | i915_gpu_error.c | 704 gt->fault_data1, gt->fault_data0); in err_print_gt()
733 if (gt->uc) in err_print_gt()
790 if (error->gt) in __err_print_to_sgl()
944 if (gt->uc) in cleanup_gt()
947 kfree(gt); in cleanup_gt()
956 struct intel_gt_coredump *gt = error->gt; in __i915_gpu_coredump_free() local
958 error->gt = gt->next; in __i915_gpu_coredump_free()
1697 for (gt = error->gt; gt; gt = gt->next) { in error_msg()
1782 gc->_gt = gt; in intel_gt_coredump_alloc()
1835 error->gt = intel_gt_coredump_alloc(&i915->gt, ALLOW_FAIL); in i915_gpu_coredump()
[all …]
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/selftests/ |
| H A D | igt_reset.c | 19 void igt_global_reset_lock(struct intel_gt *gt) in igt_global_reset_lock() argument
27 wait_event(gt->reset.queue, in igt_global_reset_lock()
30 for_each_engine(engine, gt, id) { in igt_global_reset_lock()
32 >->reset.flags)) in igt_global_reset_lock()
38 void igt_global_reset_unlock(struct intel_gt *gt) in igt_global_reset_unlock() argument
43 for_each_engine(engine, gt, id) in igt_global_reset_unlock()
47 wake_up_all(>->reset.queue); in igt_global_reset_unlock()
50 bool igt_force_reset(struct intel_gt *gt) in igt_force_reset() argument
52 intel_gt_set_wedged(gt); in igt_force_reset()
53 intel_gt_reset(gt, 0, NULL); in igt_force_reset()
[all …]
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| /netbsd/external/gpl2/gettext/dist/gettext-tools/src/ |
| H A D | msggrep.c | 221 gt->patterns = in main()
223 memcpy (gt->patterns + gt->patterns_size, optarg, len); in main()
225 *(gt->patterns + gt->patterns_size) = '\n'; in main()
264 (char *) xrealloc (gt->patterns, gt->patterns_size + count); in main()
265 memcpy (gt->patterns + gt->patterns_size, buf, count); in main()
271 && *(gt->patterns + gt->patterns_size - 1) != '\n') in main()
274 (char *) xrealloc (gt->patterns, gt->patterns_size + 1); in main()
275 *(gt->patterns + gt->patterns_size) = '\n'; in main()
443 assert (gt->patterns[gt->patterns_size - 1] == '\n'); in main()
447 gt->matcher->compile (gt->patterns, gt->patterns_size, in main()
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/gt/uc/ |
| H A D | intel_guc.c | 94 spin_lock_irq(>->irq_lock); in gen9_reset_guc_interrupts()
95 gen6_gt_pm_reset_iir(gt, gt->pm_guc_events); in gen9_reset_guc_interrupts()
96 spin_unlock_irq(>->irq_lock); in gen9_reset_guc_interrupts()
105 spin_lock_irq(>->irq_lock); in gen9_enable_guc_interrupts()
108 gt->pm_guc_events); in gen9_enable_guc_interrupts()
110 gen6_gt_pm_enable_irq(gt, gt->pm_guc_events); in gen9_enable_guc_interrupts()
121 spin_lock_irq(>->irq_lock); in gen9_disable_guc_interrupts()
124 gen6_gt_pm_disable_irq(gt, gt->pm_guc_events); in gen9_disable_guc_interrupts()
136 spin_lock_irq(>->irq_lock); in gen11_reset_guc_interrupts()
145 spin_lock_irq(>->irq_lock); in gen11_enable_guc_interrupts()
[all …]
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