Searched refs:has16BitInsts (Results 1 – 8 of 8) sorted by relevance
337 return (ElemWidth == 16 && ST->has16BitInsts()) ? 2 in getMaximumVF()589 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()604 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()615 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()631 if (ST->has16BitInsts() && SLT == MVT::f16 && !HasFP64FP16Denormals) in getArithmeticInstrCost()650 if (ST->has16BitInsts() && SLT == MVT::f16) in getArithmeticInstrCost()674 (SLT == MVT::f16 && ST->has16BitInsts())) { in getArithmeticInstrCost()679 if (SLT == MVT::f16 && ST->has16BitInsts()) { in getArithmeticInstrCost()788 if ((ST->has16BitInsts() && SLT == MVT::f16) || in getIntrinsicInstrCost()890 if (EltSize == 16 && Index == 0 && ST->has16BitInsts()) in getVectorInstrCost()
496 if (Size <= 16 && ST->has16BitInsts()) in replaceMulWithMul24()748 if (Ty->isHalfTy() && !ST->has16BitInsts()) in visitFDiv()1189 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitBinaryOperator()1319 if (ST->has16BitInsts() && needsPromotionToI32(I.getOperand(0)->getType()) && in visitICmpInst()1329 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitSelectInst()1348 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitBitreverseIntrinsicInst()
132 bool has16BitInsts() const { in has16BitInsts() function
668 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()718 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()773 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()805 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()816 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()831 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()875 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()893 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()901 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()949 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()[all …]
711 (ScalarVT == MVT::f16 && Subtarget->has16BitInsts())); in isFPImmLegal()844 (Subtarget->has16BitInsts() && VT == MVT::f16); in isFAbsFree()850 (Subtarget->has16BitInsts() && VT == MVT::f16) || in isFNegFree()887 if (DestSize== 16 && Subtarget->has16BitInsts()) in isTruncateFree()897 if (SrcSize == 16 && Subtarget->has16BitInsts()) in isZExtFree()2526 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerUINT_TO_FP()2565 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerSINT_TO_FP()3320 if (Subtarget->has16BitInsts() && VT.getScalarType().bitsLE(MVT::i16)) in performMulCombine()3418 if (LegalVT != MVT::i32 && (Subtarget->has16BitInsts() && in getFFBX_U32()3865 assert(!Subtarget->has16BitInsts() && "should only see if f16 is illegal"); in performFAbsCombine()
119 if (Subtarget->has16BitInsts()) { in SITargetLowering()405 if (Subtarget->has16BitInsts()) { in SITargetLowering()491 if (Subtarget->has16BitInsts()) { in SITargetLowering()745 if (Subtarget->has16BitInsts()) { in SITargetLowering()892 if (Subtarget->has16BitInsts()) in getRegisterTypeForCallingConv()920 if (Size == 16 && Subtarget->has16BitInsts()) in getNumRegistersForCallingConv()945 if (Size == 16 && Subtarget->has16BitInsts()) { in getVectorTypeBreakdownForCallingConv()959 if (Size < 16 && Subtarget->has16BitInsts()) { in getVectorTypeBreakdownForCallingConv()1584 if (Subtarget->has16BitInsts() && VT == MVT::i16) { in isTypeDesirableForOp()9404 if (!Subtarget->has16BitInsts() || in performZeroExtendCombine()[all …]
1320 def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
3308 return ST.has16BitInsts() && in isInlineConstant()3378 return ST.has16BitInsts() && in isInlineConstant()