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Searched refs:meta_req_height (Results 1 – 6 of 6) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
H A Damdgpu_display_rq_dlg_calc_20.c362 unsigned int meta_req_height; in get_meta_and_pte_attr() local
483 meta_req_height = 1 << log2_meta_req_height; in get_meta_and_pte_attr()
496 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_meta_and_pte_attr()
497 + meta_req_height; in get_meta_and_pte_attr()
498 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_meta_and_pte_attr()
544 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
H A Damdgpu_display_rq_dlg_calc_20v2.c362 unsigned int meta_req_height; in get_meta_and_pte_attr() local
483 meta_req_height = 1 << log2_meta_req_height; in get_meta_and_pte_attr()
496 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_meta_and_pte_attr()
497 + meta_req_height; in get_meta_and_pte_attr()
498 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_meta_and_pte_attr()
544 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
H A Damdgpu_display_rq_dlg_calc_21.c352 unsigned int meta_req_height; in get_meta_and_pte_attr() local
477 meta_req_height = 1 << log2_meta_req_height; in get_meta_and_pte_attr()
490 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_meta_and_pte_attr()
491 + meta_req_height; in get_meta_and_pte_attr()
492 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_meta_and_pte_attr()
541 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
H A Damdgpu_display_mode_vba_21.c443 unsigned int meta_req_height[],
1966 &locals->meta_req_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2529 locals->meta_req_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4557 &locals->meta_req_height[k], in dml21_ModeSupportAndSystemConfigurationFull()
5845 unsigned int meta_req_height[], in CalculateMetaAndPTETimes()
5922 - meta_req_height[k]; in CalculateMetaAndPTETimes()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
H A Damdgpu_dml1_display_rq_dlg_calc.c571 unsigned int meta_req_height; in get_surf_rq_param() local
714 meta_req_height = 1 << log2_meta_req_height; in get_surf_rq_param()
728 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_surf_rq_param()
729 + meta_req_height; in get_surf_rq_param()
730 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_surf_rq_param()
771 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_surf_rq_param()
H A Ddisplay_mode_vba.h587 unsigned int meta_req_height[DC__NUM_DPP__MAX]; member