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Searched refs:min_dst_y_next_start (Results 1 – 11 of 11) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_hubp.c97 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp2_program_deadline()
1072 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp2_read_state_common()
1365 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
1380 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp2_validate_dml_output()
1382 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
H A Damdgpu_dcn21_hubp.c463 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
478 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp21_validate_dml_output()
480 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
H A Damdgpu_display_rq_dlg_helpers.c211 dlg_regs.min_dst_y_next_start); in print__dlg_regs_st()
H A Ddisplay_mode_structs.h422 unsigned int min_dst_y_next_start; member
H A Damdgpu_dml1_display_rq_dlg_calc.c1162 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml1_rq_dlg_get_dlg_params()
1164 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml1_rq_dlg_get_dlg_params()
1176 disp_dlg_regs->min_dst_y_next_start); in dml1_rq_dlg_get_dlg_params()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
H A Damdgpu_display_rq_dlg_calc_20.c937 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params()
938 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20_rq_dlg_get_dlg_params()
954 disp_dlg_regs->min_dst_y_next_start); in dml20_rq_dlg_get_dlg_params()
H A Damdgpu_display_rq_dlg_calc_20v2.c937 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml20v2_rq_dlg_get_dlg_params()
939 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20v2_rq_dlg_get_dlg_params()
955 disp_dlg_regs->min_dst_y_next_start); in dml20v2_rq_dlg_get_dlg_params()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
H A Damdgpu_display_rq_dlg_calc_21.c983 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
984 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1005 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_hubp.c592 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp1_program_deadline()
880 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp1_read_state_common()
H A Damdgpu_dcn10_hw_sequencer_debug.c265 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_get_dlg_states()
H A Damdgpu_dcn10_hw_sequencer.c232 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_log_hubp_states()