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Searched refs:min_mem_set_clock (Results 1 – 10 of 10) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/
H A Ddm_pp_interface.h84 uint32_t min_mem_set_clock; member
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_vega12_hwmgr.c1493 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega12_notify_smc_display_config_after_ps_adjustment()
2238 if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100)) in vega12_apply_clocks_adjust_rules()
2239 dpm_table->dpm_state.hard_min_level = hwmgr->display_config->min_mem_set_clock / 100; in vega12_apply_clocks_adjust_rules()
2246 if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) { in vega12_apply_clocks_adjust_rules()
H A Damdgpu_vega20_hwmgr.c2312 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega20_notify_smc_display_config_after_ps_adjustment()
3702 if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100)) in vega20_apply_clocks_adjust_rules()
3703 dpm_table->dpm_state.hard_min_level = hwmgr->display_config->min_mem_set_clock / 100; in vega20_apply_clocks_adjust_rules()
3710 if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) { in vega20_apply_clocks_adjust_rules()
3723 …hwmgr->display_config->min_mem_set_clock / 100 >= dpm_table->dpm_levels[dpm_table->count - 1].valu… in vega20_apply_clocks_adjust_rules()
H A Damdgpu_smu8_hwmgr.c1060 clocks.memoryClock = hwmgr->display_config->min_mem_set_clock != 0 ? in smu8_apply_state_adjust_rules()
1061 hwmgr->display_config->min_mem_set_clock : in smu8_apply_state_adjust_rules()
H A Damdgpu_smu10_hwmgr.c579 uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100; in smu10_dpm_force_dpm_level()
H A Damdgpu_vega10_hwmgr.c3219 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()
3987 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_notify_smc_display_config_after_ps_adjustment()
H A Damdgpu_smu7_hwmgr.c2931 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/
H A Damdgpu_vega20_ppt.c2148 if (dpm_table->dpm_state.hard_min_level < (smu->display_config->min_mem_set_clock / 100)) in vega20_apply_clocks_adjust_rules()
2149 dpm_table->dpm_state.hard_min_level = smu->display_config->min_mem_set_clock / 100; in vega20_apply_clocks_adjust_rules()
2156 if (dpm_table->dpm_levels[i].value >= (smu->display_config->min_mem_set_clock / 100)) { in vega20_apply_clocks_adjust_rules()
2248 min_clocks.memory_clock = smu->display_config->min_mem_set_clock; in vega20_notify_smc_display_config()
H A Damdgpu_navi10_ppt.c1466 min_clocks.memory_clock = smu->display_config->min_mem_set_clock; in navi10_notify_smc_display_config()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c77 adev->pm.pm_display_cfg.min_mem_set_clock = in dm_pp_apply_display_requirements()