Searched refs:mmCP_CPC_IC_OP_CNTL (Results 1 – 7 of 7) sorted by relevance
| /netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx_v10_0.c | 2321 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache()
2323 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache()
2327 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache()
2915 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_cp_compute_load_microcode()
2917 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); in gfx_v10_0_cp_compute_load_microcode()
2921 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_cp_compute_load_microcode()
|
| /netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_8_0_d.h | 351 #define mmCP_CPC_IC_OP_CNTL 0x30bc macro
|
| H A D | gfx_8_1_d.h | 351 #define mmCP_CPC_IC_OP_CNTL 0x30bc macro
|
| /netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2606 #define mmCP_CPC_IC_OP_CNTL … macro
|
| H A D | gc_9_2_1_offset.h | 2810 #define mmCP_CPC_IC_OP_CNTL … macro
|
| H A D | gc_9_1_offset.h | 2876 #define mmCP_CPC_IC_OP_CNTL … macro
|
| H A D | gc_10_1_0_offset.h | 10264 #define mmCP_CPC_IC_OP_CNTL … macro
|