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Searched refs:mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI (Results 1 – 10 of 10) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h581 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
H A Dgfx_7_2_d.h594 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
H A Dgfx_8_0_d.h644 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
H A Dgfx_8_1_d.h644 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2840 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
H A Dgc_9_2_1_offset.h3024 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
H A Dgc_9_1_offset.h3068 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
H A Dgc_10_1_0_offset.h5306 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v10_0.c3420 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, in gfx_v10_0_kiq_init_register()
H A Damdgpu_gfx_v9_0.c3527 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, in gfx_v9_0_kiq_init_register()