Searched refs:mmCP_HQD_PQ_WPTR_POLL_ADDR (Results 1 – 13 of 13) sorted by relevance
| /netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| H A D | polaris10_pwrvirus.h | 1511 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
1521 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
1531 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
1541 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v9.c | 311 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR), in kgd_gfx_v9_hqd_load()
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| H A D | amdgpu_amdkfd_gfx_v10.c | 321 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR), in kgd_hqd_load()
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| H A D | amdgpu_gfx_v10_0.c | 3424 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v10_0_kiq_init_register()
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| H A D | amdgpu_gfx_v9_0.c | 3531 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v9_0_kiq_init_register()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 582 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
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| H A D | gfx_7_2_d.h | 595 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
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| H A D | gfx_8_0_d.h | 645 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
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| H A D | gfx_8_1_d.h | 645 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2842 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
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| H A D | gc_9_2_1_offset.h | 3026 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
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| H A D | gc_9_1_offset.h | 3070 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
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| H A D | gc_10_1_0_offset.h | 5308 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
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