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Searched refs:mmCP_MES_DC_OP_CNTL (Results 1 – 2 of 2) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_mes_v10_1.c206 data = RREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL); in mes_v10_1_enable()
209 WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data); in mes_v10_1_enable()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h7740 #define mmCP_MES_DC_OP_CNTL … macro