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Searched refs:mmCP_QUEUE_THRESHOLDS (Results 1 – 10 of 10) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h495 #define mmCP_QUEUE_THRESHOLDS 0x21D8 macro
H A Dgfx_7_0_d.h539 #define mmCP_QUEUE_THRESHOLDS 0x21d8 macro
H A Dgfx_7_2_d.h552 #define mmCP_QUEUE_THRESHOLDS 0x21d8 macro
H A Dgfx_8_0_d.h605 #define mmCP_QUEUE_THRESHOLDS 0x21d8 macro
H A Dgfx_8_1_d.h605 #define mmCP_QUEUE_THRESHOLDS 0x21d8 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v6_0.c1740 WREG32(mmCP_QUEUE_THRESHOLDS, ((0x16 << CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) | in gfx_v6_0_constants_init()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h222 #define mmCP_QUEUE_THRESHOLDS … macro
H A Dgc_9_2_1_offset.h216 #define mmCP_QUEUE_THRESHOLDS … macro
H A Dgc_9_1_offset.h222 #define mmCP_QUEUE_THRESHOLDS … macro
H A Dgc_10_1_0_offset.h2226 #define mmCP_QUEUE_THRESHOLDS … macro