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Searched refs:mmJPEG_CGC_GATE (Results 1 – 7 of 7) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_jpeg_v2_5.c272 data = RREG32_SOC15(JPEG, inst, mmJPEG_CGC_GATE); in jpeg_v2_5_disable_clock_gating()
278 WREG32_SOC15(JPEG, inst, mmJPEG_CGC_GATE, data); in jpeg_v2_5_disable_clock_gating()
292 data = RREG32_SOC15(JPEG, inst, mmJPEG_CGC_GATE); in jpeg_v2_5_enable_clock_gating()
298 WREG32_SOC15(JPEG, inst, mmJPEG_CGC_GATE, data); in jpeg_v2_5_enable_clock_gating()
H A Damdgpu_jpeg_v2_0.c297 data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE); in jpeg_v2_0_disable_clock_gating()
303 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data); in jpeg_v2_0_disable_clock_gating()
320 data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE); in jpeg_v2_0_enable_clock_gating()
326 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data); in jpeg_v2_0_enable_clock_gating()
H A Damdgpu_vcn_v1_0.c460 data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE); in vcn_v1_0_disable_clock_gating()
462 WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data); in vcn_v1_0_disable_clock_gating()
585 data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE); in vcn_v1_0_enable_clock_gating()
587 WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data); in vcn_v1_0_enable_clock_gating()
649 WREG32_SOC15_DPG_MODE(UVD, 0, mmJPEG_CGC_GATE, 0, 0xFFFFFFFF, sram_sel); in vcn_v1_0_clock_gating_dpg_mode()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_offset.h140 #define mmJPEG_CGC_GATE … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h300 #define mmJPEG_CGC_GATE … macro
H A Dvcn_2_5_offset.h365 #define mmJPEG_CGC_GATE … macro
H A Dvcn_2_0_0_offset.h350 #define mmJPEG_CGC_GATE … macro