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Searched refs:mmRLC_GPU_IOV_UCODE_ADDR (Results 1 – 5 of 5) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1539 #define mmRLC_GPU_IOV_UCODE_ADDR 0xfb42 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6818 #define mmRLC_GPU_IOV_UCODE_ADDR … macro
H A Dgc_9_2_1_offset.h7084 #define mmRLC_GPU_IOV_UCODE_ADDR … macro
H A Dgc_9_1_offset.h7044 #define mmRLC_GPU_IOV_UCODE_ADDR … macro
H A Dgc_10_1_0_offset.h10438 #define mmRLC_GPU_IOV_UCODE_ADDR … macro