Home
last modified time | relevance | path

Searched refs:mmRLC_SPARE_INT (Results 1 – 5 of 5) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsoc15_common.h83 uint32_t spare_int = adev->reg_offset[GC_HWIP][0][mmRLC_SPARE_INT_BASE_IDX] + mmRLC_SPARE_INT; \
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6262 #define mmRLC_SPARE_INT … macro
H A Dgc_9_2_1_offset.h6460 #define mmRLC_SPARE_INT … macro
H A Dgc_9_1_offset.h6484 #define mmRLC_SPARE_INT … macro
H A Dgc_10_1_0_offset.h9572 #define mmRLC_SPARE_INT … macro