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Searched refs:mmSDMA0_RLC0_MIDCMD_DATA5_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h367 #define mmSDMA0_RLC0_MIDCMD_DATA5_BASE_IDX … macro
H A Dsdma0_4_0_offset.h455 #define mmSDMA0_RLC0_MIDCMD_DATA5_BASE_IDX 0 macro
H A Dsdma0_4_2_offset.h451 #define mmSDMA0_RLC0_MIDCMD_DATA5_BASE_IDX … macro
H A Dsdma0_4_2_2_offset.h455 #define mmSDMA0_RLC0_MIDCMD_DATA5_BASE_IDX … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h443 #define mmSDMA0_RLC0_MIDCMD_DATA5_BASE_IDX … macro