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Searched refs:mmSDMA0_RLC0_MINOR_PTR_UPDATE (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c172 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); in kgd_hqd_sdma_load()
184 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); in kgd_hqd_sdma_load()
221 reg <= mmSDMA0_RLC0_MINOR_PTR_UPDATE; reg++) in kgd_hqd_sdma_dump()
H A Damdgpu_amdkfd_gfx_v9.c458 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); in kgd_hqd_sdma_load()
470 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); in kgd_hqd_sdma_load()
507 reg <= mmSDMA0_RLC0_MINOR_PTR_UPDATE; reg++) in kgd_hqd_sdma_dump()
H A Damdgpu_amdkfd_gfx_v10.c470 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); in kgd_hqd_sdma_load()
482 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); in kgd_hqd_sdma_load()
519 reg <= mmSDMA0_RLC0_MINOR_PTR_UPDATE; reg++) in kgd_hqd_sdma_dump()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h354 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE … macro
H A Dsdma0_4_0_offset.h442 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE 0x0175 macro
H A Dsdma0_4_2_offset.h438 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE … macro
H A Dsdma0_4_2_2_offset.h442 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h430 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE … macro