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Searched refs:mmSDMA0_RLC0_RB_CNTL (Results 1 – 15 of 15) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c90 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset()
123 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
146 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load()
196 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load()
216 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump()
244 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied()
265 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy()
267 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy()
281 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy()
282 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
H A Damdgpu_amdkfd_gfx_v10.c219 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, in get_sdma_rlc_reg_offset()
227 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL in get_sdma_rlc_reg_offset()
231 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
444 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load()
494 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load()
514 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump()
564 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied()
693 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy()
695 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy()
709 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy()
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H A Damdgpu_amdkfd_gfx_v9.c229 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, in get_sdma_rlc_reg_offset()
234 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
432 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load()
482 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load()
502 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump()
552 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied()
623 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy()
625 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy()
639 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy()
640 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
H A Damdgpu_amdkfd_gfx_v8.c322 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load()
361 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load()
381 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump()
434 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied()
559 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy()
561 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy()
575 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy()
576 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
H A Damdgpu_amdkfd_gfx_v7.c336 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load()
375 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load()
395 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump()
439 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied()
561 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy()
563 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy()
577 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy()
578 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
H A Dcikd.h567 #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h292 #define mmSDMA0_RLC0_RB_CNTL … macro
H A Dsdma0_4_0_offset.h380 #define mmSDMA0_RLC0_RB_CNTL 0x0140 macro
H A Dsdma0_4_2_offset.h376 #define mmSDMA0_RLC0_RB_CNTL … macro
H A Dsdma0_4_2_2_offset.h380 #define mmSDMA0_RLC0_RB_CNTL … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h216 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
H A Doss_3_0_1_d.h255 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
H A Doss_2_0_d.h270 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
H A Doss_3_0_d.h377 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h369 #define mmSDMA0_RLC0_RB_CNTL … macro