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Searched refs:mmSDMA1_RLC1_RB_WPTR_POLL_CNTL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h471 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL_BASE_IDX 0 macro
H A Dsdma1_4_2_2_offset.h471 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL_BASE_IDX … macro
H A Dsdma1_4_2_offset.h467 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL_BASE_IDX … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1466 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL_BASE_IDX … macro