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Searched refs:mmUVD_DPG_PAUSE_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h45 #define mmUVD_DPG_PAUSE_BASE_IDX macro
H A Dvcn_2_5_offset.h418 #define mmUVD_DPG_PAUSE_BASE_IDX macro
H A Dvcn_2_0_0_offset.h403 #define mmUVD_DPG_PAUSE_BASE_IDX macro