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Searched refs:mmVGT_TF_MEMORY_BASE_HI (Results 1 – 5 of 5) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4944 #define mmVGT_TF_MEMORY_BASE_HI … macro
H A Dgc_9_2_1_offset.h5130 #define mmVGT_TF_MEMORY_BASE_HI … macro
H A Dgc_9_1_offset.h5174 #define mmVGT_TF_MEMORY_BASE_HI … macro
H A Dgc_10_1_0_offset.h2356 #define mmVGT_TF_MEMORY_BASE_HI … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v10_0.c3691 (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_HI) << in gfx_v10_0_setup_grbm_cam_remapping()