/netbsd/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
H A D | sama5d3_lcd.dtsi | 60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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H A D | exynos4412-pinctrl.dtsi | 3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device 130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 144 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 151 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 157 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 158 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 185 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 206 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | s5pv210-pinctrl.dtsi | 285 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 292 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 299 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 306 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 313 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 320 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 327 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 334 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 340 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 341 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; [all …]
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H A D | exynos4210-pinctrl.dtsi | 3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device 149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 163 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 170 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 176 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 225 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | exynos5420-pinctrl.dtsi | 3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device 64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 177 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 184 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 226 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 233 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | exynos5250-pinctrl.dtsi | 3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 258 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 272 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 279 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | s3c64xx-pinctrl.dtsi | 4 * - pin control-related definitions 8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are 137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 203 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 210 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 216 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 228 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 264 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; [all …]
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H A D | exynos5260-pinctrl.dtsi | 3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device 237 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 244 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 288 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 295 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 316 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | exynos3250-pinctrl.dtsi | 3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device 36 samsung,pin-val = <_val>; \ 42 samsung,pin-function = <_sel>; \ 115 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 122 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 142 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 156 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 163 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 170 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | at91sam9x5_lcd.dtsi | 63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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H A D | exynos5410-pinctrl.dtsi | 3 * Exynos5410 SoC pin-mux and pin-config device tree source 311 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 332 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 346 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 353 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 360 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 395 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 402 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 647 samsung,pin-function = <2>; 648 samsung,pin-pud = <0>; [all …]
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/netbsd/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/exynos/ |
H A D | exynos5433-pinctrl.dtsi | 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 186 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 193 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 278 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 285 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 292 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 313 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 320 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | exynos7-pinctrl.dtsi | 3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as 190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 253 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 260 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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/netbsd/sys/arch/arm/imx/ |
H A D | imx23_pinctrl.c | 318 #define PIN2MUXSEL_MASK(pin) (3<<(pin % 16 * 2)) argument 327 #define PIN2DRIVE_MASK(pin) (3<<(pin % 8 * 4)) argument 336 #define PIN2PULL_MASK(pin) (1<<(pin % 32)) argument 345 #define PIN2DOUT_MASK(pin) (1<<(pin % 32)) argument 349 #define PIN2DIN_MASK(pin) (1<<(pin % 32)) argument 358 #define PIN2DOE_MASK(pin) (1<<(pin % 32)) argument 535 if (PINCTRL_RD(sc, PIN2DIN_REG(pin)) & PIN2DIN_MASK(pin)) in imx23_pinctrl_gp_pin_read() 549 PINCTRL_WR(sc, PIN2DOUT_SET_REG(pin), PIN2DOUT_MASK(pin)); in imx23_pinctrl_gp_pin_write() 551 PINCTRL_WR(sc, PIN2DOUT_CLR_REG(pin), PIN2DOUT_MASK(pin)); in imx23_pinctrl_gp_pin_write() 590 PINCTRL_WR(sc, PIN2DOE_SET_REG(pin), PIN2DOE_MASK(pin)); in imx23_pinctrl_gp_pin_ctl() [all …]
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/netbsd/sys/arch/arm/xilinx/ |
H A D | zynq_gpio.c | 48 #define MASK_DATA_REG(pin) (0x000 + 0x4 * ((pin) / 16)) argument 49 #define DATA_RO_REG(pin) (0x060 + 0x4 * ((pin) / 32)) argument 50 #define DATA_RO_BIT(pin) __BIT((pin) % 32) argument 51 #define DIRM_REG(pin) (0x204 + 0x40 * ((pin) / 32)) argument 52 #define DIRM_BIT(pin) __BIT((pin) % 32) argument 53 #define OEN_REG(pin) (0x208 + 0x40 * ((pin) / 32)) argument 54 #define OEN_BIT(pin) __BIT((pin) % 32) argument 157 kmem_free(pin, sizeof(*pin)); in zynq_gpio_release() 244 u_int pin; in zynq_gpio_attach_ports() local 251 for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) { in zynq_gpio_attach_ports() [all …]
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/netbsd/sys/arch/mips/alchemy/dev/ |
H A D | augpio.c | 96 int pin; in augpio_attach() local 136 for (pin = 0; pin < sc->sc_npins; pin++) { in augpio_attach() 158 pin = 1 << pin; in augpio_read() 170 pin = 1 << pin; in augpio_write() 179 pin = 1 << pin; in augpio_ctl() 208 pin = 1 << pin; in augpio2_read() 220 pin = 1 << pin; in augpio2_write() 223 pin = pin | (pin << 16); in augpio2_write() 225 pin = (pin << 16); in augpio2_write() 236 pin = 1 << pin; in augpio2_ctl() [all …]
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H A D | augpiovar.h | 47 #define AUGPIO_READ(pin) augpio_read(NULL, (pin)) argument 48 #define AUGPIO_WRITE(pin,val) augpio_write(NULL, (pin), (val)) argument 49 #define AUGPIO_CTL(pin,flags) augpio_ctl(NULL, (pin), (flags)) argument 50 #define AUGPIO_GETCTL(pin) augpio_getctl(NULL, (pin)) argument 52 #define AUGPIO2_READ(pin) augpio2_read(NULL, (pin)) argument 53 #define AUGPIO2_WRITE(pin,val) augpio2_write(NULL, (pin), (val)) argument 54 #define AUGPIO2_CTL(pin,flags) augpio2_ctl(NULL, (pin), (flags)) argument 55 #define AUGPIO2_GETCTL(pin) augpio2_getctl(NULL, (pin)) argument
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/netbsd/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/actions/ |
H A D | s900-bubblegum-96.dts | 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO-B", /* GPIO_1, LSEC pin 24 */ 96 "GPIO-C", /* GPIO_2, LSEC pin 25 */ 97 "GPIO-D", /* GPIO_3, LSEC pin 26 */ 98 "GPIO-E", /* GPIO_4, LSEC pin 27 */ 99 "GPIO-F", /* GPIO_5, LSEC pin 28 */ 100 "GPIO-G", /* GPIO_6, LSEC pin 29 */ 101 "GPIO-H", /* GPIO_7, LSEC pin 30 */ 102 "GPIO-I", /* GPIO_8, LSEC pin 31 */ 103 "GPIO-J", /* GPIO_9, LSEC pin 32 */ [all …]
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/netbsd/sys/dev/gpio/ |
H A D | gpio.c | 150 for (pin = 0; pin < sc->sc_npins; pin++) { in gpio_resume() 246 for (pin = 0; pin < sc->sc_npins; pin++) { in gpio_attach() 379 if (pin < 0 || pin >= sc->sc_npins) in gpio_pin_can_map() 401 if (pin < 0 || pin >= sc->sc_npins) in gpio_pin_map() 754 if (pin < 0 || pin >= sc->sc_npins) in gpio_ioctl() 781 if (pin < 0 || pin >= sc->sc_npins) in gpio_ioctl() 813 if (pin < 0 || pin >= sc->sc_npins) in gpio_ioctl() 921 if (pin < 0 || pin >= sc->sc_npins) in gpio_ioctl() 977 if (pin < 0 || pin >= sc->sc_npins) in gpio_ioctl() 1026 if (pin < 0 || pin >= sc->sc_npins) in gpio_ioctl_oapi() [all …]
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/netbsd/sys/arch/evbsh3/ap_ms104_sh4/ |
H A D | ap_ms104_sh4.c | 93 KASSERT(pin >= 0 && pin <= 15); in gpio_intr_establish() 100 gpio_intr_func_table[pin].ih_irq = pin; in gpio_intr_establish() 106 reg |= 1 << pin; in gpio_intr_establish() 111 return &gpio_intr_func_table[pin]; in gpio_intr_establish() 118 int pin = ih->ih_irq; in gpior_intr_disestablish() local 122 KASSERT(pin >= 0 && pin <= 15); in gpior_intr_disestablish() 128 reg &= ~(1 << pin); in gpior_intr_disestablish() 146 int pin; in gpio_intr() local 149 for (pin = 0; pin < 16; pin++) { in gpio_intr() 150 if (reg & (1 << pin)) { in gpio_intr() [all …]
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/netbsd/sys/arch/arm/ti/ |
H A D | ti_gpio.c | 159 oe |= __BIT(pin); in ti_gpio_ctl() 161 oe &= ~__BIT(pin); in ti_gpio_ctl() 195 gpin->pin_nr = pin; in ti_gpio_acquire() 209 ti_gpio_ctl(pin->pin_sc, pin->pin_nr, GPIO_PIN_INPUT); in ti_gpio_release() 212 kmem_free(pin, sizeof(*pin)); in ti_gpio_release() 315 sc->sc_intr[pin].intr_pin = pin; in ti_gpio_intr_establish() 359 return &sc->sc_intr[pin]; in ti_gpio_intr_establish() 431 u_int pin; in ti_gpio_attach_ports() local 438 for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) { in ti_gpio_attach_ports() 439 sc->sc_pins[pin].pin_num = pin; in ti_gpio_attach_ports() [all …]
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/netbsd/sys/arch/mips/adm5120/dev/ |
H A D | admgpio.c | 67 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OE); in admgpio_pin_ctl() 77 admgpio_pin_read(void *cookie, int pin) in admgpio_pin_read() argument 82 KASSERT(pin >= 0 && pin < 8); in admgpio_pin_read() 85 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_IV); in admgpio_pin_read() 100 KASSERT(pin >= 0 && pin < 8); in admgpio_pin_write() 102 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV); in admgpio_pin_write() 112 int pin; in admgpio_attach() local 118 for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) { in admgpio_attach() 119 sc->sc_pins[pin].pin_num = pin; in admgpio_attach() 122 if ((oe & (1 << pin)) != 0) in admgpio_attach() [all …]
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/netbsd/sys/arch/arm/rockchip/ |
H A D | rk_gpio.c | 102 ddr &= ~__BIT(pin); in rk_gpio_ctl() 104 ddr |= __BIT(pin); in rk_gpio_ctl() 136 gpin->pin_nr = pin; in rk_gpio_acquire() 150 rk_gpio_ctl(pin->pin_sc, pin->pin_nr, GPIO_PIN_INPUT); in rk_gpio_release() 153 kmem_free(pin, sizeof(*pin)); in rk_gpio_release() 164 KASSERT(sc == pin->pin_sc); in rk_gpio_read() 171 if (!raw && pin->pin_actlo) in rk_gpio_read() 263 u_int pin; in rk_gpio_attach_ports() local 270 for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) { in rk_gpio_attach_ports() 271 sc->sc_pins[pin].pin_num = pin; in rk_gpio_attach_ports() [all …]
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/netbsd/sys/dev/ic/ |
H A D | pl061.c | 51 u_int pin; in plgpio_attach() local 61 for (pin = 0; pin < 8; pin++) { in plgpio_attach() 62 sc->sc_pins[pin].pin_num = pin; in plgpio_attach() 64 if ((cnf & __BIT(pin)) != 0) in plgpio_attach() 66 sc->sc_pins[pin].pin_caps = in plgpio_attach() 69 sc->sc_pins[pin].pin_state = in plgpio_attach() 70 plgpio_pin_read(sc, pin); in plgpio_attach() 90 return (v >> pin) & 1; in plgpio_pin_read() 98 PLGPIO_WRITE(sc, PL061_GPIODATA_REG(1 << pin), val << pin); in plgpio_pin_write() 109 v &= ~(1 << pin); in plgpio_pin_ctl() [all …]
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/netbsd/sys/dev/ppbus/ |
H A D | ppbus_gpio.c | 81 gpio_pin_t *pin; in gpio_ppbus_attach() local 84 for (pin = &sc->sc_gpio_pins[0], i = 0; i < PPBUS_NPINS; pin++, i++) { in gpio_ppbus_attach() 85 pin->pin_num = i; in gpio_ppbus_attach() 88 pin->pin_caps = GPIO_PIN_INPUT; in gpio_ppbus_attach() 89 pin->pin_flags = GPIO_PIN_INPUT; in gpio_ppbus_attach() 92 pin->pin_caps = GPIO_PIN_OUTPUT; in gpio_ppbus_attach() 93 pin->pin_flags = GPIO_PIN_OUTPUT; in gpio_ppbus_attach() 94 pin->pin_state = GPIO_PIN_LOW; in gpio_ppbus_attach() 138 return ((port >> ppbus_port[pin].bit) & 1) ^ ppbus_port[pin].inv; in gpio_ppbus_pin_read() 147 value ^= ppbus_port[pin].inv; in gpio_ppbus_pin_write() [all …]
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