| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| H A D | amdgpu_dcn_calc_auto.c | 270 v->required_output_bw = v->pixel_clock[k] / 2.0; in mode_support_and_system_configuration()
273 v->required_output_bw = v->pixel_clock[k]; in mode_support_and_system_configuration()
277 v->required_output_bw = v->pixel_clock[k] * 3.0 / 2.0; in mode_support_and_system_configuration()
280 v->required_output_bw = v->pixel_clock[k] * 3.0; in mode_support_and_system_configuration()
779 …v->dst_x_after_scaler = 90.0 * v->pixel_clock[k] / (v->required_dispclk[i][j] / (j + 1)) + 42.0 * … in mode_support_and_system_configuration()
815 v->htotal[k] / v->pixel_clock[k] / 4.0); in mode_support_and_system_configuration()
823 v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_without_immediate_flip, in mode_support_and_system_configuration()
827 v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_without_immediate_flip, in mode_support_and_system_configuration()
855 v->time_for_meta_pte_with_immediate_flip = v->htotal[k] / v->pixel_clock[k] / 4.0; in mode_support_and_system_configuration()
1648 …v->dstx_after_scaler = 90.0 * v->pixel_clock[k] / v->dppclk + 42.0 * v->pixel_clock[k] / v->dispcl… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
[all …]
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_atombios_encoders.c | 348 args.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dac()
617 args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
652 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
672 args.v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
717 amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dig_encoder()
722 cpu_to_le32(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
856 args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
913 args.v2.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
955 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
1068 args.v5.usSymClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
[all …]
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| H A D | amdgpu_encoders.c | 211 u32 pixel_clock) in amdgpu_dig_monitor_is_duallink() argument
231 if (pixel_clock > 340000) in amdgpu_dig_monitor_is_duallink()
236 if (pixel_clock > 165000) in amdgpu_dig_monitor_is_duallink()
253 if (pixel_clock > 340000) in amdgpu_dig_monitor_is_duallink()
258 if (pixel_clock > 165000) in amdgpu_dig_monitor_is_duallink()
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| /netbsd/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_atombios_encoders.c | 402 args.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dac_setup()
617 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
642 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
898 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_encoder_setup2()
935 args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_encoder_setup2()
958 args.v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_encoder_setup2()
1110 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_transmitter_setup2()
1167 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_transmitter_setup2()
1209 args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_transmitter_setup2()
1322 args.v5.usSymClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_transmitter_setup2()
[all …]
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| H A D | radeon_encoders.c | 376 u32 pixel_clock) in radeon_dig_monitor_is_duallink() argument
398 if (pixel_clock > 340000) in radeon_dig_monitor_is_duallink()
403 if (pixel_clock > 165000) in radeon_dig_monitor_is_duallink()
423 if (pixel_clock > 340000) in radeon_dig_monitor_is_duallink()
428 if (pixel_clock > 165000) in radeon_dig_monitor_is_duallink()
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| /netbsd/usr.sbin/grfconfig/ |
| H A D | grfconfig.c | 170 gv->pixel_clock = atoi(cps[1]); in main()
194 if ((gv->pixel_clock == 0) || in main()
329 gv->pixel_clock / (gv->htotal * 1000), in main()
330 (gv->pixel_clock / (gv->htotal * 100)) in main()
332 gv->pixel_clock / (gv->htotal * gv->vtotal)); in main()
372 gv->pixel_clock, in print_modeline()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
| H A D | amdgpu_command_table.c | 298 params.ulPixelClock = cntl->pixel_clock / 10; in encoder_control_digx_v5()
461 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v2()
467 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v2()
860 params.ulSymClock = cntl->pixel_clock/10; in transmitter_control_v1_6()
1545 uint32_t pixel_clock,
1550 uint32_t pixel_clock,
1576 uint32_t pixel_clock, in dac_encoder_control_prepare_params() argument
1594 uint32_t pixel_clock, in dac1_encoder_control_v1() argument
1603 pixel_clock, in dac1_encoder_control_v1()
1615 uint32_t pixel_clock, in dac2_encoder_control_v1() argument
[all …]
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| H A D | amdgpu_command_table2.c | 142 params.pclk_10khz = cntl->pixel_clock / 10; in encoder_control_digx_v1_5()
279 ps.param.symclk_10khz = cntl->pixel_clock/10; in transmitter_control_v1_6()
347 struct dmub_rb_cmd_set_pixel_clock pixel_clock = { 0 }; in set_pixel_clock_dmcub() local
349 pixel_clock.header.type = DMUB_CMD__VBIOS; in set_pixel_clock_dmcub()
350 pixel_clock.header.sub_type = DMUB_CMD__VBIOS_SET_PIXEL_CLOCK; in set_pixel_clock_dmcub()
351 pixel_clock.pixel_clock.clk = *clk; in set_pixel_clock_dmcub()
353 dc_dmub_srv_cmd_queue(dmcub, &pixel_clock.header); in set_pixel_clock_dmcub()
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| H A D | command_table.h | 60 uint32_t pixel_clock,
65 uint32_t pixel_clock,
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| H A D | command_table2.h | 60 uint32_t pixel_clock,
65 uint32_t pixel_clock,
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 114 uint32_t pixel_clock; /* khz */ member
127 uint32_t pixel_clock; /* in KHz */ member
154 uint32_t pixel_clock; member
197 uint32_t pixel_clock; member
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| /netbsd/sys/dev/ic/ |
| H A D | dw_hdmi_phy.c | 302 for (mpll_conf = &sc->sc_mpll_config[0]; mpll_conf->pixel_clock != 0; mpll_conf++) in dwhdmi_phy_configure()
303 if (mode->clock <= mpll_conf->pixel_clock) in dwhdmi_phy_configure()
310 for (phy_conf = &sc->sc_phy_config[0]; phy_conf->pixel_clock != 0; phy_conf++) in dwhdmi_phy_configure()
311 if (mode->clock <= phy_conf->pixel_clock) in dwhdmi_phy_configure()
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| H A D | dw_hdmi.h | 53 u_int pixel_clock; member
60 u_int pixel_clock; member
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | amdgpu_dce_link_encoder.c | 925 uint32_t pixel_clock) in dce110_link_encoder_enable_tmds_output() argument
945 cntl.pixel_clock = pixel_clock; in dce110_link_encoder_enable_tmds_output()
961 uint32_t pixel_clock) in dce110_link_encoder_enable_lvds_output() argument
978 cntl.pixel_clock = pixel_clock; in dce110_link_encoder_enable_lvds_output()
1014 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_output()
1053 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_mst_output()
1132 cntl.pixel_clock = link_settings->link_settings.link_rate * in dce110_link_encoder_dp_set_lane_settings()
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| H A D | dce_link_encoder.h | 216 uint32_t pixel_clock);
234 uint32_t pixel_clock);
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| /netbsd/sys/arch/amiga/dev/ |
| H A D | grf_ul.c | 397 if (abs(md->pixel_clock - ulowell_clock[0]) > in ul_load_mon()
398 abs(md->pixel_clock - ulowell_clock[1])) { in ul_load_mon()
401 md->pixel_clock = ulowell_clock[1]; in ul_load_mon()
405 md->pixel_clock = ulowell_clock[0]; in ul_load_mon()
586 vm->pixel_clock = md->pixel_clock; in ul_getvmode()
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| H A D | grfioctl.h | 85 u_long pixel_clock; /* in Hz. */ member
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| H A D | link_encoder.h | 142 uint32_t pixel_clock);
151 uint32_t pixel_clock);
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_link_encoder.c | 919 uint32_t pixel_clock) in dcn10_link_encoder_enable_tmds_output() argument
939 cntl.pixel_clock = pixel_clock; in dcn10_link_encoder_enable_tmds_output()
976 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_output()
1015 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_mst_output()
1098 cntl.pixel_clock = link_settings->link_settings.link_rate * in dcn10_link_encoder_dp_set_lane_settings()
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| /netbsd/sys/arch/arm/s3c2xx0/ |
| H A D | s3c24x0_lcd.h | 84 int pixel_clock; /* in Hz */ member
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| H A D | s3c24x0_lcd.c | 107 clkval = (hclk / info->pixel_clock / 2) - 1; in s3c24x0_set_lcd_panel_info()
110 clkval = uimax(2, hclk / info->pixel_clock / 2); in s3c24x0_set_lcd_panel_info()
120 hclk, info->pixel_clock, clkval, reg); in s3c24x0_set_lcd_panel_info()
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| /netbsd/sys/external/bsd/drm2/dist/include/drm/ |
| H A D | drm_displayid.h | 80 u8 pixel_clock[3]; member
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/virtual/ |
| H A D | amdgpu_virtual_link_encoder.c | 53 uint32_t pixel_clock) {} in virtual_link_encoder_enable_tmds_output() argument
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| /netbsd/usr.sbin/videomode/ |
| H A D | videomode.c | 160 vm->pixel_clock, vm->disp_width, vm->disp_height, vm->depth); in dump_vm()
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| /netbsd/sys/arch/atari/dev/ |
| H A D | grfioctl.h | 92 u_long pixel_clock; /* in Hz. */ member
|