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Searched refs:reg_data (Results 1 – 20 of 20) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v1_0.c638 uint32_t reg_data = 0; in vcn_v1_0_clock_gating_dpg_mode() local
646 reg_data |= 4 << JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v1_0_clock_gating_dpg_mode()
657 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v1_0_clock_gating_dpg_mode()
658 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
1212 uint32_t reg_data = 0; in vcn_v1_0_pause_dpg_mode() local
1223 reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) & in vcn_v1_0_pause_dpg_mode()
1237 WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); in vcn_v1_0_pause_dpg_mode()
1267 WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); in vcn_v1_0_pause_dpg_mode()
1279 reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) & in vcn_v1_0_pause_dpg_mode()
1298 WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); in vcn_v1_0_pause_dpg_mode()
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H A Damdgpu_vcn_v2_0.c559 uint32_t reg_data = 0; in vcn_v2_0_clock_gating_dpg_mode() local
563 reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v2_0_clock_gating_dpg_mode()
565 reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v2_0_clock_gating_dpg_mode()
567 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_0_clock_gating_dpg_mode()
568 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
1143 uint32_t reg_data = 0; in vcn_v2_0_pause_dpg_mode() local
1150 reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) & in vcn_v2_0_pause_dpg_mode()
1160 reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; in vcn_v2_0_pause_dpg_mode()
1161 WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); in vcn_v2_0_pause_dpg_mode()
1192 reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; in vcn_v2_0_pause_dpg_mode()
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H A Damdgpu_vcn_v2_5.c650 uint32_t reg_data = 0; in vcn_v2_5_clock_gating_dpg_mode() local
654 reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v2_5_clock_gating_dpg_mode()
656 reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v2_5_clock_gating_dpg_mode()
657 reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT; in vcn_v2_5_clock_gating_dpg_mode()
658 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_5_clock_gating_dpg_mode()
659 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
680 UVD, 0, mmUVD_CGC_CTRL), reg_data, sram_sel, indirect); in vcn_v2_5_clock_gating_dpg_mode()
1373 uint32_t reg_data = 0; in vcn_v2_5_pause_dpg_mode() local
1390 reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; in vcn_v2_5_pause_dpg_mode()
1421 reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; in vcn_v2_5_pause_dpg_mode()
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H A Damdgpu_atombios.c1601 ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = in amdgpu_atombios_init_mc_reg_table() local
1622 while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) && in amdgpu_atombios_init_mc_reg_table()
1624 t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK) in amdgpu_atombios_init_mc_reg_table()
1628 (u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK) in amdgpu_atombios_init_mc_reg_table()
1633 (u32)le32_to_cpu(*((u32 *)reg_data + j)); in amdgpu_atombios_init_mc_reg_table()
1642 reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) in amdgpu_atombios_init_mc_reg_table()
1643 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
1645 if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) in amdgpu_atombios_init_mc_reg_table()
/netbsd/external/gpl3/gdb/dist/gdb/
H A Darm-linux-tdep.c553 const gdb_byte *reg_data; in supply_nwfpe_register() local
564 memcpy (buf, reg_data, 4); in supply_nwfpe_register()
567 memcpy (buf, reg_data + 4, 4); in supply_nwfpe_register()
568 memcpy (buf + 4, reg_data, 4); in supply_nwfpe_register()
573 memcpy (buf, reg_data, 4); in supply_nwfpe_register()
574 memcpy (buf + 4, reg_data + 8, 4); in supply_nwfpe_register()
588 gdb_byte *reg_data; in collect_nwfpe_register() local
605 memcpy (reg_data, buf, 4); in collect_nwfpe_register()
608 memcpy (reg_data, buf + 4, 4); in collect_nwfpe_register()
609 memcpy (reg_data + 4, buf, 4); in collect_nwfpe_register()
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/netbsd/external/gpl3/gdb.old/dist/gdb/
H A Darm-linux-tdep.c553 const gdb_byte *reg_data; in supply_nwfpe_register() local
564 memcpy (buf, reg_data, 4); in supply_nwfpe_register()
567 memcpy (buf, reg_data + 4, 4); in supply_nwfpe_register()
568 memcpy (buf + 4, reg_data, 4); in supply_nwfpe_register()
573 memcpy (buf, reg_data, 4); in supply_nwfpe_register()
574 memcpy (buf + 4, reg_data + 8, 4); in supply_nwfpe_register()
588 gdb_byte *reg_data; in collect_nwfpe_register() local
605 memcpy (reg_data, buf, 4); in collect_nwfpe_register()
608 memcpy (reg_data, buf + 4, 4); in collect_nwfpe_register()
609 memcpy (reg_data + 4, buf, 4); in collect_nwfpe_register()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/modules/stats/
H A Dstats.c120 unsigned int reg_data; in mod_stats_create() local
136 &reg_data, sizeof(unsigned int), &flag)) in mod_stats_create()
137 core_stats->enabled = reg_data; in mod_stats_create()
143 &reg_data, sizeof(unsigned int), &flag)) { in mod_stats_create()
144 if (reg_data > DAL_STATS_ENTRIES_REGKEY_MAX) in mod_stats_create()
147 core_stats->entries = reg_data; in mod_stats_create()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
H A Dkfd_dbgdev.c435 packets_vec[0].reg_data[0] = cntl.u32All; in dbgdev_address_watch_diq()
445 packets_vec[1].reg_data[0] = addrHi.u32All; in dbgdev_address_watch_diq()
455 packets_vec[2].reg_data[0] = addrLo.u32All; in dbgdev_address_watch_diq()
471 packets_vec[3].reg_data[0] = cntl.u32All; in dbgdev_address_watch_diq()
661 packets_vec[0].reg_data[0] = reg_gfx_index.u32All; in dbgdev_wave_control_diq()
670 packets_vec[1].reg_data[0] = reg_sq_cmd.u32All; in dbgdev_wave_control_diq()
685 packets_vec[2].reg_data[0] = reg_gfx_index.u32All; in dbgdev_wave_control_diq()
H A Dkfd_pm4_headers_diq.h201 unsigned int reg_data[1]; /*1..N of these fields */ member
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_compressor.c253 uint32_t reg_data; in dce110_compressor_disable_fbc() local
255 reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); in dce110_compressor_disable_fbc()
256 set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN); in dce110_compressor_disable_fbc()
257 dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data); in dce110_compressor_disable_fbc()
H A Damdgpu_dce110_transform_v.c641 uint32_t reg_data = 0; in dce110_xfmv_set_pixel_storage_depth() local
666 reg_data, in dce110_xfmv_set_pixel_storage_depth()
672 reg_data, in dce110_xfmv_set_pixel_storage_depth()
677 dm_write_reg(xfm->ctx, mmLBV_DATA_FORMAT, reg_data); in dce110_xfmv_set_pixel_storage_depth()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_smu8_smumgr.c183 uint32_t reg_data; in smu8_load_mec_firmware() local
213 reg_data = lower_32_bits(info.mc_addr) & in smu8_load_mec_firmware()
215 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); in smu8_load_mec_firmware()
217 reg_data = upper_32_bits(info.mc_addr) & in smu8_load_mec_firmware()
219 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); in smu8_load_mec_firmware()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
H A Damdgpu_dce112_compressor.c428 uint32_t reg_data; in dce112_compressor_disable_fbc() local
430 reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); in dce112_compressor_disable_fbc()
431 set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN); in dce112_compressor_disable_fbc()
432 dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data); in dce112_compressor_disable_fbc()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/gvt/
H A Dedid.c297 u32 reg_data = 0; in gmbus3_mmio_read() local
310 reg_data |= (byte_data << (i << 3)); in gmbus3_mmio_read()
313 memcpy(&vgpu_vreg(vgpu, offset), &reg_data, byte_count); in gmbus3_mmio_read()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_ppatomctrl.c59 ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) in atomctrl_retrieve_ac_timing() local
64 while (*(uint32_t *)reg_data != END_OF_REG_DATA_BLOCK && in atomctrl_retrieve_ac_timing()
66 tmem_id = (uint8_t)((*(uint32_t *)reg_data & MEM_ID_MASK) >> MEM_ID_SHIFT); in atomctrl_retrieve_ac_timing()
70 (uint32_t)((*(uint32_t *)reg_data & CLOCK_RANGE_MASK) >> in atomctrl_retrieve_ac_timing()
77 (uint32_t)*((uint32_t *)reg_data + j); in atomctrl_retrieve_ac_timing()
88 reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) in atomctrl_retrieve_ac_timing()
89 ((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ; in atomctrl_retrieve_ac_timing()
92 PP_ASSERT_WITH_CODE((*(uint32_t *)reg_data == END_OF_REG_DATA_BLOCK), in atomctrl_retrieve_ac_timing()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_audio.c64 uint32_t reg_data) in write_indirect_azalia_reg() argument
74 AZALIA_ENDPOINT_REG_DATA, reg_data); in write_indirect_azalia_reg()
77 reg_index, reg_data); in write_indirect_azalia_reg()
/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_atombios.c4007 ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = in radeon_atom_init_mc_reg_table() local
4028 while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) && in radeon_atom_init_mc_reg_table()
4030 t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK) in radeon_atom_init_mc_reg_table()
4034 (u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK) in radeon_atom_init_mc_reg_table()
4039 (u32)le32_to_cpu(*((u32 *)reg_data + j)); in radeon_atom_init_mc_reg_table()
4048 reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) in radeon_atom_init_mc_reg_table()
4049 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
4051 if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) in radeon_atom_init_mc_reg_table()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_perf.c1937 const struct i915_oa_reg *reg_data, in write_cs_mi_lri() argument
1950 *cs++ = i915_mmio_reg_offset(reg_data[i].addr); in write_cs_mi_lri()
1951 *cs++ = reg_data[i].value; in write_cs_mi_lri()
/netbsd/sys/dev/pci/
H A Dif_wm.c4915 uint16_t reg_data, reg_addr; in wm_init_lcd_from_nvm() local
4917 if (wm_nvm_read(sc, (word_addr + i * 2), 1, &reg_data) != 0) in wm_init_lcd_from_nvm()
4924 phy_page = reg_data; in wm_init_lcd_from_nvm()
4931 reg_data); in wm_init_lcd_from_nvm()
/netbsd/external/gpl3/gcc/dist/gcc/
H A DChangeLog-19989055 * regclass.c (allocate_reg_info): Initialize the entire reg_data