Home
last modified time | relevance | path

Searched refs:v3f32 (Results 1 – 9 of 9) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DMachineValueType.h146 v3f32 = 89, // 3 x f32 enumerator
622 case v3f32: in getVectorElementType()
769 case v3f32: return 3; in getVectorMinNumElements()
908 case v3f32: return TypeSize::Fixed(96); in getSizeInBits()
1224 if (NumElements == 3) return MVT::v3f32; in getVectorVT()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td690 def SGPR_96 : RegisterClass<"AMDGPU", [v3i32, v3f32], 32,
695 def SReg_96 : RegisterClass<"AMDGPU", [v3i32, v3f32], 32,
811 defm VReg_96 : VRegClass<3, [v3i32, v3f32], (add VGPR_96)>;
832 defm AReg_96 : ARegClass<3, [v3i32, v3f32], (add AGPR_96)>;
H A DBUFInstructions.td801 "buffer_load_format_xyz", v3f32
813 "buffer_store_format_xyz", v3f32
1236 defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format, v3f32, "BUFFER_LOAD_FORMAT_XYZ">;
1270 defm : MUBUF_LoadIntrinsicPat<SIbuffer_load, v3f32, "BUFFER_LOAD_DWORDX3">;
1319 defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v3f32, "BUFFER_STORE_FORMAT_XYZ">;
1353 defm : MUBUF_StoreIntrinsicPat<SIbuffer_store, v3f32, "BUFFER_STORE_DWORDX3">;
1787 defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v3f32, "TBUFFER_LOAD_FORMAT_XYZ">;
1851 defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, v3f32, "TBUFFER_STORE_FORMAT_XYZ">;
H A DAMDGPUISelLowering.cpp72 setOperationAction(ISD::LOAD, MVT::v3f32, Promote); in AMDGPUTargetLowering()
73 AddPromotedToType(ISD::LOAD, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
168 setLoadExtAction(ISD::EXTLOAD, MVT::v3f32, MVT::v3f16, Expand); in AMDGPUTargetLowering()
192 setOperationAction(ISD::STORE, MVT::v3f32, Promote); in AMDGPUTargetLowering()
193 AddPromotedToType(ISD::STORE, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
252 setTruncStoreAction(MVT::v3f32, MVT::v3f16, Expand); in AMDGPUTargetLowering()
323 setOperationAction(ISD::CONCAT_VECTORS, MVT::v3f32, Custom); in AMDGPUTargetLowering()
332 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v3f32, Custom); in AMDGPUTargetLowering()
457 MVT::v2f32, MVT::v3f32, MVT::v4f32, MVT::v5f32 in AMDGPUTargetLowering()
499 setOperationAction(ISD::SELECT, MVT::v3f32, Promote); in AMDGPUTargetLowering()
[all …]
H A DSIInstructions.td1016 f32, v3f32, Index, !cast<SubRegIndex>(sub#Index)
1019 f32, v3f32, Index, !cast<SubRegIndex>(sub#Index)
1189 def : BitConvert <v3i32, v3f32, SGPR_96>;
1190 def : BitConvert <v3f32, v3i32, SGPR_96>;
H A DSIISelLowering.cpp93 addRegisterClass(MVT::v3f32, TRI->getVGPRClassForBitWidth(96)); in SITargetLowering()
366 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v3f32, Custom); in SITargetLowering()
5791 Type = MVT::v3f32; in getBuildDwordsVector()
7436 (WidenedVT == MVT::v3i32 || WidenedVT == MVT::v3f32)) { in getMemIntrinsicNode()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DValueTypes.td119 def v3f32 : ValueType<96, 89>; // 3 x f32 vector value
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DValueTypes.cpp350 case MVT::v3f32: in getTypeForEVT()
/netbsd/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenTarget.cpp153 case MVT::v3f32: return "MVT::v3f32"; in getEnumName()