1 // This file is automatically generated by rmconfig - DO NOT EDIT!
2 //
3 // private rmconfig generated #defines such as IsG84(),
4 // RMCFG_FEATURE_ENABLED_STATUS(), etc.
5 //
6 // Only for use within resman.
7 //
8 // Profile:  shipping-gpus-openrm
9 // Template: templates/gt_rmconfig_private.h
10 //
11 // Chips:    TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X
12 //
13 
14 #ifndef _G_RMCFG_PRIVATE_H_
15 #define _G_RMCFG_PRIVATE_H_
16 
17 //
18 // CHIP identity macros such as IsGK104()
19 //
20 
21 // GF10X
22 #define IsGF100(pGpu)                  ((0) && (pGpu))
23 #define IsGF100orBetter(pGpu)          ((1) && (pGpu))
24 
25 #define IsGF100B(pGpu)                 ((0) && (pGpu))
26 #define IsGF100BorBetter(pGpu)         ((1) && (pGpu))
27 
28 #define IsGF104(pGpu)                  ((0) && (pGpu))
29 #define IsGF104orBetter(pGpu)          ((1) && (pGpu))
30 
31 #define IsGF104B(pGpu)                 ((0) && (pGpu))
32 #define IsGF104BorBetter(pGpu)         ((1) && (pGpu))
33 
34 #define IsGF106(pGpu)                  ((0) && (pGpu))
35 #define IsGF106orBetter(pGpu)          ((1) && (pGpu))
36 
37 #define IsGF106B(pGpu)                 ((0) && (pGpu))
38 #define IsGF106BorBetter(pGpu)         ((1) && (pGpu))
39 
40 #define IsGF108(pGpu)                  ((0) && (pGpu))
41 #define IsGF108orBetter(pGpu)          ((1) && (pGpu))
42 
43 // Any GF10X chip?
44 #define IsGF10X(pGpu)                  (0 && (pGpu))
45 #define IsGF10XorBetter(pGpu)          (1 || (pGpu))
46 
47 
48 // GF11X
49 #define IsGF110D(pGpu)                 ((0) && (pGpu))
50 #define IsGF110DorBetter(pGpu)         ((1) && (pGpu))
51 
52 #define IsGF110(pGpu)                  ((0) && (pGpu))
53 #define IsGF110orBetter(pGpu)          ((1) && (pGpu))
54 
55 #define IsGF117(pGpu)                  ((0) && (pGpu))
56 #define IsGF117orBetter(pGpu)          ((1) && (pGpu))
57 #define IsGF117MaskRevA01(pGpu)        ((0) && (pGpu))
58 
59 #define IsGF118(pGpu)                  ((0) && (pGpu))
60 #define IsGF118orBetter(pGpu)          ((1) && (pGpu))
61 
62 #define IsGF119(pGpu)                  ((0) && (pGpu))
63 #define IsGF119orBetter(pGpu)          ((1) && (pGpu))
64 #define IsGF119MaskRevA01(pGpu)        ((0) && (pGpu))
65 
66 // Any GF11X chip?
67 #define IsGF11X(pGpu)                  (0 && (pGpu))
68 #define IsGF11XorBetter(pGpu)          (1 || (pGpu))
69 
70 
71 // GF10XF
72 #define IsGF110F(pGpu)                 ((0) && (pGpu))
73 #define IsGF110ForBetter(pGpu)         ((1) && (pGpu))
74 
75 #define IsGF110F2(pGpu)                ((0) && (pGpu))
76 #define IsGF110F2orBetter(pGpu)        ((1) && (pGpu))
77 
78 #define IsGF110F3(pGpu)                ((0) && (pGpu))
79 #define IsGF110F3orBetter(pGpu)        ((1) && (pGpu))
80 
81 // Any GF10XF chip?
82 #define IsGF10XF(pGpu)                 (0 && (pGpu))
83 #define IsGF10XForBetter(pGpu)         (1 || (pGpu))
84 
85 
86 // GK10X
87 #define IsGK104(pGpu)                  ((0) && (pGpu))
88 #define IsGK104orBetter(pGpu)          ((1) && (pGpu))
89 #define IsGK104MaskRevA01(pGpu)        ((0) && (pGpu))
90 
91 #define IsGK106(pGpu)                  ((0) && (pGpu))
92 #define IsGK106orBetter(pGpu)          ((1) && (pGpu))
93 
94 #define IsGK107(pGpu)                  ((0) && (pGpu))
95 #define IsGK107orBetter(pGpu)          ((1) && (pGpu))
96 #define IsGK107MaskRevA01(pGpu)        ((0) && (pGpu))
97 
98 #define IsGK20A(pGpu)                  ((0) && (pGpu))
99 #define IsGK20AorBetter(pGpu)          ((1) && (pGpu))
100 
101 // Any GK10X chip?
102 #define IsGK10X(pGpu)                  (0 && (pGpu))
103 #define IsGK10XorBetter(pGpu)          (1 || (pGpu))
104 
105 
106 // GK11X
107 #define IsGK110(pGpu)                  ((0) && (pGpu))
108 #define IsGK110orBetter(pGpu)          ((1) && (pGpu))
109 
110 #define IsGK110B(pGpu)                 ((0) && (pGpu))
111 #define IsGK110BorBetter(pGpu)         ((1) && (pGpu))
112 
113 #define IsGK110C(pGpu)                 ((0) && (pGpu))
114 #define IsGK110CorBetter(pGpu)         ((1) && (pGpu))
115 
116 // Any GK11X chip?
117 #define IsGK11X(pGpu)                  (0 && (pGpu))
118 #define IsGK11XorBetter(pGpu)          (1 || (pGpu))
119 
120 
121 // GK20X
122 #define IsGK208(pGpu)                  ((0) && (pGpu))
123 #define IsGK208orBetter(pGpu)          ((1) && (pGpu))
124 
125 #define IsGK208S(pGpu)                 ((0) && (pGpu))
126 #define IsGK208SorBetter(pGpu)         ((1) && (pGpu))
127 
128 // Any GK20X chip?
129 #define IsGK20X(pGpu)                  (0 && (pGpu))
130 #define IsGK20XorBetter(pGpu)          (1 || (pGpu))
131 
132 
133 // GM10X
134 #define IsGM107(pGpu)                  ((0) && (pGpu))
135 #define IsGM107orBetter(pGpu)          ((1) && (pGpu))
136 #define IsGM107MaskRevA01(pGpu)        ((0) && (pGpu))
137 
138 #define IsGM108(pGpu)                  ((0) && (pGpu))
139 #define IsGM108orBetter(pGpu)          ((1) && (pGpu))
140 #define IsGM108MaskRevA01(pGpu)        ((0) && (pGpu))
141 
142 // Any GM10X chip?
143 #define IsGM10X(pGpu)                  (0 && (pGpu))
144 #define IsGM10XorBetter(pGpu)          (1 || (pGpu))
145 
146 
147 // GM20X
148 #define IsGM200(pGpu)                  ((0) && (pGpu))
149 #define IsGM200orBetter(pGpu)          ((1) && (pGpu))
150 
151 #define IsGM204(pGpu)                  ((0) && (pGpu))
152 #define IsGM204orBetter(pGpu)          ((1) && (pGpu))
153 
154 #define IsGM206(pGpu)                  ((0) && (pGpu))
155 #define IsGM206orBetter(pGpu)          ((1) && (pGpu))
156 
157 // Any GM20X chip?
158 #define IsGM20X(pGpu)                  (0 && (pGpu))
159 #define IsGM20XorBetter(pGpu)          (1 || (pGpu))
160 
161 
162 // GP10X
163 #define IsGP100(pGpu)                  ((0) && (pGpu))
164 #define IsGP100orBetter(pGpu)          ((1) && (pGpu))
165 
166 #define IsGP102(pGpu)                  ((0) && (pGpu))
167 #define IsGP102orBetter(pGpu)          ((1) && (pGpu))
168 
169 #define IsGP104(pGpu)                  ((0) && (pGpu))
170 #define IsGP104orBetter(pGpu)          ((1) && (pGpu))
171 
172 #define IsGP106(pGpu)                  ((0) && (pGpu))
173 #define IsGP106orBetter(pGpu)          ((1) && (pGpu))
174 
175 #define IsGP107(pGpu)                  ((0) && (pGpu))
176 #define IsGP107orBetter(pGpu)          ((1) && (pGpu))
177 
178 #define IsGP108(pGpu)                  ((0) && (pGpu))
179 #define IsGP108orBetter(pGpu)          ((1) && (pGpu))
180 
181 // Any GP10X chip?
182 #define IsGP10X(pGpu)                  (0 && (pGpu))
183 #define IsGP10XorBetter(pGpu)          (1 || (pGpu))
184 
185 
186 // GV10X
187 #define IsGV100(pGpu)                  ((0) && (pGpu))
188 #define IsGV100orBetter(pGpu)          ((1) && (pGpu))
189 
190 // Any GV10X chip?
191 #define IsGV10X(pGpu)                  (0 && (pGpu))
192 #define IsGV10XorBetter(pGpu)          (1 || (pGpu))
193 
194 
195 // GV11X
196 #define IsGV11B(pGpu)                  ((0) && (pGpu))
197 #define IsGV11BorBetter(pGpu)          ((1) && (pGpu))
198 
199 // Any GV11X chip?
200 #define IsGV11X(pGpu)                  (0 && (pGpu))
201 #define IsGV11XorBetter(pGpu)          (1 || (pGpu))
202 
203 
204 // TU10X
205 #define IsTU102(pGpu)                  rmcfg_IsTU102(pGpu)
206 #define IsTU102orBetter(pGpu)          ((1) && (pGpu))
207 
208 #define IsTU104(pGpu)                  rmcfg_IsTU104(pGpu)
209 #define IsTU104orBetter(pGpu)          rmcfg_IsTU104orBetter(pGpu)
210 
211 #define IsTU106(pGpu)                  rmcfg_IsTU106(pGpu)
212 #define IsTU106orBetter(pGpu)          rmcfg_IsTU106orBetter(pGpu)
213 
214 #define IsTU116(pGpu)                  rmcfg_IsTU116(pGpu)
215 #define IsTU116orBetter(pGpu)          rmcfg_IsTU116orBetter(pGpu)
216 
217 #define IsTU117(pGpu)                  rmcfg_IsTU117(pGpu)
218 #define IsTU117orBetter(pGpu)          rmcfg_IsTU117orBetter(pGpu)
219 
220 // Any TU10X chip?
221 #define IsTU10X(pGpu)                  rmcfg_IsTU10X(pGpu)
222 #define IsTU10XorBetter(pGpu)          (1 || (pGpu))
223 
224 
225 // GA10X
226 #define IsGA100(pGpu)                  rmcfg_IsGA100(pGpu)
227 #define IsGA100orBetter(pGpu)          rmcfg_IsGA100orBetter(pGpu)
228 
229 #define IsGA102(pGpu)                  rmcfg_IsGA102(pGpu)
230 #define IsGA102orBetter(pGpu)          rmcfg_IsGA102orBetter(pGpu)
231 
232 #define IsGA103(pGpu)                  rmcfg_IsGA103(pGpu)
233 #define IsGA103orBetter(pGpu)          rmcfg_IsGA103orBetter(pGpu)
234 
235 #define IsGA104(pGpu)                  rmcfg_IsGA104(pGpu)
236 #define IsGA104orBetter(pGpu)          rmcfg_IsGA104orBetter(pGpu)
237 
238 #define IsGA106(pGpu)                  rmcfg_IsGA106(pGpu)
239 #define IsGA106orBetter(pGpu)          rmcfg_IsGA106orBetter(pGpu)
240 
241 #define IsGA107(pGpu)                  rmcfg_IsGA107(pGpu)
242 #define IsGA107orBetter(pGpu)          rmcfg_IsGA107orBetter(pGpu)
243 
244 #define IsGA10B(pGpu)                  ((0) && (pGpu))
245 #define IsGA10BorBetter(pGpu)          rmcfg_IsGA10BorBetter(pGpu)
246 
247 // Any GA10X chip?
248 #define IsGA10X(pGpu)                  rmcfg_IsGA10X(pGpu)
249 #define IsGA10XorBetter(pGpu)          rmcfg_IsGA10XorBetter(pGpu)
250 
251 
252 // GA10XF
253 #define IsGA102F(pGpu)                 ((0) && (pGpu))
254 #define IsGA102ForBetter(pGpu)         rmcfg_IsGA102ForBetter(pGpu)
255 
256 // Any GA10XF chip?
257 #define IsGA10XF(pGpu)                 (0 && (pGpu))
258 #define IsGA10XForBetter(pGpu)         rmcfg_IsGA10XForBetter(pGpu)
259 
260 
261 // AD10X
262 #define IsAD102(pGpu)                  rmcfg_IsAD102(pGpu)
263 #define IsAD102orBetter(pGpu)          rmcfg_IsAD102orBetter(pGpu)
264 
265 #define IsAD103(pGpu)                  rmcfg_IsAD103(pGpu)
266 #define IsAD103orBetter(pGpu)          rmcfg_IsAD103orBetter(pGpu)
267 
268 #define IsAD104(pGpu)                  rmcfg_IsAD104(pGpu)
269 #define IsAD104orBetter(pGpu)          rmcfg_IsAD104orBetter(pGpu)
270 
271 #define IsAD106(pGpu)                  rmcfg_IsAD106(pGpu)
272 #define IsAD106orBetter(pGpu)          rmcfg_IsAD106orBetter(pGpu)
273 
274 #define IsAD107(pGpu)                  rmcfg_IsAD107(pGpu)
275 #define IsAD107orBetter(pGpu)          rmcfg_IsAD107orBetter(pGpu)
276 
277 // Any AD10X chip?
278 #define IsAD10X(pGpu)                  rmcfg_IsAD10X(pGpu)
279 #define IsAD10XorBetter(pGpu)          rmcfg_IsAD10XorBetter(pGpu)
280 
281 
282 // GH10X
283 #define IsGH100(pGpu)                  rmcfg_IsGH100(pGpu)
284 #define IsGH100orBetter(pGpu)          rmcfg_IsGH100orBetter(pGpu)
285 
286 // Any GH10X chip?
287 #define IsGH10X(pGpu)                  rmcfg_IsGH10X(pGpu)
288 #define IsGH10XorBetter(pGpu)          rmcfg_IsGH10XorBetter(pGpu)
289 
290 
291 // GH20X
292 #define IsGH202(pGpu)                  ((0) && (pGpu))
293 #define IsGH202orBetter(pGpu)          ((0) && (pGpu))
294 
295 // Any GH20X chip?
296 #define IsGH20X(pGpu)                  (0 && (pGpu))
297 #define IsGH20XorBetter(pGpu)          (0 && (pGpu))
298 
299 
300 // T12X
301 #define IsT001_FERMI_NOT_EXIST(pGpu)   ((0) && (pGpu))
302 #define IsT001_FERMI_NOT_EXISTorBetter(pGpu) ((0) && (pGpu))
303 
304 #define IsT124(pGpu)                   ((0) && (pGpu))
305 #define IsT124orBetter(pGpu)           ((0) && (pGpu))
306 
307 // Any T12X chip?
308 #define IsT12X(pGpu)                   (0 && (pGpu))
309 #define IsT12XorBetter(pGpu)           (0 && (pGpu))
310 
311 
312 // T13X
313 #define IsT132(pGpu)                   ((0) && (pGpu))
314 #define IsT132orBetter(pGpu)           ((0) && (pGpu))
315 
316 // Any T13X chip?
317 #define IsT13X(pGpu)                   (0 && (pGpu))
318 #define IsT13XorBetter(pGpu)           (0 && (pGpu))
319 
320 
321 // T21X
322 #define IsT210(pGpu)                   ((0) && (pGpu))
323 #define IsT210orBetter(pGpu)           ((0) && (pGpu))
324 
325 // Any T21X chip?
326 #define IsT21X(pGpu)                   (0 && (pGpu))
327 #define IsT21XorBetter(pGpu)           (0 && (pGpu))
328 
329 
330 // T18X
331 #define IsT186(pGpu)                   ((0) && (pGpu))
332 #define IsT186orBetter(pGpu)           ((0) && (pGpu))
333 
334 // Any T18X chip?
335 #define IsT18X(pGpu)                   (0 && (pGpu))
336 #define IsT18XorBetter(pGpu)           (0 && (pGpu))
337 
338 
339 // T19X
340 #define IsT194(pGpu)                   ((0) && (pGpu))
341 #define IsT194orBetter(pGpu)           ((0) && (pGpu))
342 
343 #define IsT002_TURING_NOT_EXIST(pGpu)  ((0) && (pGpu))
344 #define IsT002_TURING_NOT_EXISTorBetter(pGpu) ((0) && (pGpu))
345 
346 // Any T19X chip?
347 #define IsT19X(pGpu)                   (0 && (pGpu))
348 #define IsT19XorBetter(pGpu)           (0 && (pGpu))
349 
350 
351 // T23XG
352 #define IsT234(pGpu)                   ((0) && (pGpu))
353 #define IsT234orBetter(pGpu)           ((0) && (pGpu))
354 
355 #define IsT003_ADA_NOT_EXIST(pGpu)     ((0) && (pGpu))
356 #define IsT003_ADA_NOT_EXISTorBetter(pGpu) ((0) && (pGpu))
357 
358 #define IsT004_HOPPER_NOT_EXIST(pGpu)  ((0) && (pGpu))
359 #define IsT004_HOPPER_NOT_EXISTorBetter(pGpu) ((0) && (pGpu))
360 
361 // Any T23XG chip?
362 #define IsT23XG(pGpu)                  (0 && (pGpu))
363 #define IsT23XGorBetter(pGpu)          (0 && (pGpu))
364 
365 
366 // T23XD
367 #define IsT234D(pGpu)                  ((0) && (pGpu))
368 #define IsT234DorBetter(pGpu)          ((0) && (pGpu))
369 
370 // Any T23XD chip?
371 #define IsT23XD(pGpu)                  (0 && (pGpu))
372 #define IsT23XDorBetter(pGpu)          (0 && (pGpu))
373 
374 
375 // SIMS
376 #define IsAMODEL(pGpu)                 ((0) && (pGpu))
377 #define IsAMODELorBetter(pGpu)         ((0) && (pGpu))
378 
379 // Any SIMS chip?
380 #define IsSIMS(pGpu)                   (0 && (pGpu))
381 #define IsSIMSorBetter(pGpu)           (0 && (pGpu))
382 
383 
384 // Any CLASSIC_GPUS chip?
385 #define IsCLASSIC_GPUS(pGpu)           (1 || (pGpu))
386 #define IsCLASSIC_GPUSorBetter(pGpu)   (1 || (pGpu))
387 
388 
389 // Any dFERMI chip?
390 #define IsdFERMI(pGpu)                 (0 && (pGpu))
391 #define IsdFERMIorBetter(pGpu)         (1 || (pGpu))
392 
393 
394 // Any FERMI chip?
395 #define IsFERMI(pGpu)                  (IsFERMI_CLASSIC_GPUS(pGpu) || IsFERMI_TEGRA_BIG_GPUS(pGpu))
396 #define IsFERMIorBetter(pGpu)          (IsFERMI_CLASSIC_GPUSorBetter(pGpu) || IsFERMI_TEGRA_BIG_GPUSorBetter(pGpu))
397 
398 
399 // Any FERMI_CLASSIC_GPUS chip?
400 #define IsFERMI_CLASSIC_GPUS(pGpu)     (0 && (pGpu))
401 #define IsFERMI_CLASSIC_GPUSorBetter(pGpu) (1 || (pGpu))
402 
403 
404 // Any DISPLAYLESS chip?
405 #define IsDISPLAYLESS(pGpu)            rmcfg_IsDISPLAYLESS(pGpu)
406 
407 
408 // Any dKEPLER chip?
409 #define IsdKEPLER(pGpu)                (0 && (pGpu))
410 #define IsdKEPLERorBetter(pGpu)        (1 || (pGpu))
411 
412 
413 // Any KEPLER chip?
414 #define IsKEPLER(pGpu)                 (IsKEPLER_CLASSIC_GPUS(pGpu) || IsKEPLER_TEGRA_BIG_GPUS(pGpu))
415 #define IsKEPLERorBetter(pGpu)         (IsKEPLER_CLASSIC_GPUSorBetter(pGpu) || IsKEPLER_TEGRA_BIG_GPUSorBetter(pGpu))
416 
417 
418 // Any KEPLER_CLASSIC_GPUS chip?
419 #define IsKEPLER_CLASSIC_GPUS(pGpu)    (0 && (pGpu))
420 #define IsKEPLER_CLASSIC_GPUSorBetter(pGpu) (1 || (pGpu))
421 
422 
423 // Any dMAXWELL chip?
424 #define IsdMAXWELL(pGpu)               (0 && (pGpu))
425 #define IsdMAXWELLorBetter(pGpu)       (1 || (pGpu))
426 
427 
428 // Any MAXWELL chip?
429 #define IsMAXWELL(pGpu)                (IsMAXWELL_CLASSIC_GPUS(pGpu) || IsMAXWELL_TEGRA_BIG_GPUS(pGpu))
430 #define IsMAXWELLorBetter(pGpu)        (IsMAXWELL_CLASSIC_GPUSorBetter(pGpu) || IsMAXWELL_TEGRA_BIG_GPUSorBetter(pGpu))
431 
432 
433 // Any MAXWELL_CLASSIC_GPUS chip?
434 #define IsMAXWELL_CLASSIC_GPUS(pGpu)   (0 && (pGpu))
435 #define IsMAXWELL_CLASSIC_GPUSorBetter(pGpu) (1 || (pGpu))
436 
437 
438 // Any dPASCAL chip?
439 #define IsdPASCAL(pGpu)                (0 && (pGpu))
440 #define IsdPASCALorBetter(pGpu)        (1 || (pGpu))
441 
442 
443 // Any PASCAL chip?
444 #define IsPASCAL(pGpu)                 (IsPASCAL_CLASSIC_GPUS(pGpu) || IsPASCAL_TEGRA_BIG_GPUS(pGpu))
445 #define IsPASCALorBetter(pGpu)         (IsPASCAL_CLASSIC_GPUSorBetter(pGpu) || IsPASCAL_TEGRA_BIG_GPUSorBetter(pGpu))
446 
447 
448 // Any PASCAL_CLASSIC_GPUS chip?
449 #define IsPASCAL_CLASSIC_GPUS(pGpu)    (0 && (pGpu))
450 #define IsPASCAL_CLASSIC_GPUSorBetter(pGpu) (1 || (pGpu))
451 
452 
453 // Any dVOLTA chip?
454 #define IsdVOLTA(pGpu)                 (0 && (pGpu))
455 #define IsdVOLTAorBetter(pGpu)         (1 || (pGpu))
456 
457 
458 // Any VOLTA chip?
459 #define IsVOLTA(pGpu)                  (IsVOLTA_CLASSIC_GPUS(pGpu) || IsVOLTA_TEGRA_BIG_GPUS(pGpu))
460 #define IsVOLTAorBetter(pGpu)          (IsVOLTA_CLASSIC_GPUSorBetter(pGpu) || IsVOLTA_TEGRA_BIG_GPUSorBetter(pGpu))
461 
462 
463 // Any VOLTA_CLASSIC_GPUS chip?
464 #define IsVOLTA_CLASSIC_GPUS(pGpu)     (0 && (pGpu))
465 #define IsVOLTA_CLASSIC_GPUSorBetter(pGpu) (1 || (pGpu))
466 
467 
468 // Any dTURING chip?
469 #define IsdTURING(pGpu)                rmcfg_IsdTURING(pGpu)
470 #define IsdTURINGorBetter(pGpu)        (1 || (pGpu))
471 
472 
473 // Any TURING chip?
474 #define IsTURING(pGpu)                 (IsTURING_CLASSIC_GPUS(pGpu) || IsTURING_TEGRA_BIG_GPUS(pGpu))
475 #define IsTURINGorBetter(pGpu)         (IsTURING_CLASSIC_GPUSorBetter(pGpu) || IsTURING_TEGRA_BIG_GPUSorBetter(pGpu))
476 
477 
478 // Any TURING_CLASSIC_GPUS chip?
479 #define IsTURING_CLASSIC_GPUS(pGpu)    rmcfg_IsTURING_CLASSIC_GPUS(pGpu)
480 #define IsTURING_CLASSIC_GPUSorBetter(pGpu) (1 || (pGpu))
481 
482 
483 // Any dAMPERE chip?
484 #define IsdAMPERE(pGpu)                rmcfg_IsdAMPERE(pGpu)
485 #define IsdAMPEREorBetter(pGpu)        rmcfg_IsdAMPEREorBetter(pGpu)
486 
487 
488 // Any AMPERE chip?
489 #define IsAMPERE(pGpu)                 (IsAMPERE_CLASSIC_GPUS(pGpu) || IsAMPERE_TEGRA_BIG_GPUS(pGpu))
490 #define IsAMPEREorBetter(pGpu)         (IsAMPERE_CLASSIC_GPUSorBetter(pGpu) || IsAMPERE_TEGRA_BIG_GPUSorBetter(pGpu))
491 
492 
493 // Any AMPERE_CLASSIC_GPUS chip?
494 #define IsAMPERE_CLASSIC_GPUS(pGpu)    rmcfg_IsAMPERE_CLASSIC_GPUS(pGpu)
495 #define IsAMPERE_CLASSIC_GPUSorBetter(pGpu) rmcfg_IsAMPERE_CLASSIC_GPUSorBetter(pGpu)
496 
497 
498 // Any TEGRA_DGPU_AMPERE chip?
499 #define IsTEGRA_DGPU_AMPERE(pGpu)      (0 && (pGpu))
500 
501 
502 // Any TEGRA_DGPU chip?
503 #define IsTEGRA_DGPU(pGpu)             (0 && (pGpu))
504 
505 
506 // Any DFPGA chip?
507 #define IsDFPGA(pGpu)                  (0 && (pGpu))
508 
509 
510 // Any dADA chip?
511 #define IsdADA(pGpu)                   rmcfg_IsdADA(pGpu)
512 #define IsdADAorBetter(pGpu)           rmcfg_IsdADAorBetter(pGpu)
513 
514 
515 // Any ADA chip?
516 #define IsADA(pGpu)                    (IsADA_CLASSIC_GPUS(pGpu) || IsADA_TEGRA_BIG_GPUS(pGpu))
517 #define IsADAorBetter(pGpu)            (IsADA_CLASSIC_GPUSorBetter(pGpu) || IsADA_TEGRA_BIG_GPUSorBetter(pGpu))
518 
519 
520 // Any ADA_CLASSIC_GPUS chip?
521 #define IsADA_CLASSIC_GPUS(pGpu)       rmcfg_IsADA_CLASSIC_GPUS(pGpu)
522 #define IsADA_CLASSIC_GPUSorBetter(pGpu) rmcfg_IsADA_CLASSIC_GPUSorBetter(pGpu)
523 
524 
525 // Any dHOPPER chip?
526 #define IsdHOPPER(pGpu)                rmcfg_IsdHOPPER(pGpu)
527 #define IsdHOPPERorBetter(pGpu)        rmcfg_IsdHOPPERorBetter(pGpu)
528 
529 
530 // Any HOPPER chip?
531 #define IsHOPPER(pGpu)                 (IsHOPPER_CLASSIC_GPUS(pGpu) || IsHOPPER_TEGRA_BIG_GPUS(pGpu))
532 #define IsHOPPERorBetter(pGpu)         (IsHOPPER_CLASSIC_GPUSorBetter(pGpu) || IsHOPPER_TEGRA_BIG_GPUSorBetter(pGpu))
533 
534 
535 // Any HOPPER_CLASSIC_GPUS chip?
536 #define IsHOPPER_CLASSIC_GPUS(pGpu)    rmcfg_IsHOPPER_CLASSIC_GPUS(pGpu)
537 #define IsHOPPER_CLASSIC_GPUSorBetter(pGpu) rmcfg_IsHOPPER_CLASSIC_GPUSorBetter(pGpu)
538 
539 
540 // Any TEGRA_DISP chip?
541 #define IsTEGRA_DISP(pGpu)             (IsTEGRA_DISP_CLASSIC_GPUS(pGpu) || IsTEGRA_DISP_TEGRA_BIG_GPUS(pGpu) || IsTEGRA_DISP_TEGRA_NVDISP_GPUS(pGpu))
542 #define IsTEGRA_DISPorBetter(pGpu)     (IsTEGRA_DISP_CLASSIC_GPUSorBetter(pGpu) || IsTEGRA_DISP_TEGRA_BIG_GPUSorBetter(pGpu) || IsTEGRA_DISP_TEGRA_NVDISP_GPUSorBetter(pGpu))
543 
544 
545 // Any TEGRA_BIG_GPUS chip?
546 #define IsTEGRA_BIG_GPUS(pGpu)         (0 && (pGpu))
547 #define IsTEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
548 
549 
550 // Any FERMI_TEGRA_BIG_GPUS chip?
551 #define IsFERMI_TEGRA_BIG_GPUS(pGpu)   (0 && (pGpu))
552 #define IsFERMI_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
553 
554 
555 // Any TEGRA chip?
556 #define IsTEGRA(pGpu)                  (IsTEGRA_TEGRA_BIG_GPUS(pGpu) || IsTEGRA_TEGRA_NVDISP_GPUS(pGpu))
557 #define IsTEGRAorBetter(pGpu)          (IsTEGRA_TEGRA_BIG_GPUSorBetter(pGpu) || IsTEGRA_TEGRA_NVDISP_GPUSorBetter(pGpu))
558 
559 
560 // Any TEGRA_TEGRA_BIG_GPUS chip?
561 #define IsTEGRA_TEGRA_BIG_GPUS(pGpu)   (0 && (pGpu))
562 #define IsTEGRA_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
563 
564 
565 // Any tKEPLER chip?
566 #define IstKEPLER(pGpu)                (0 && (pGpu))
567 #define IstKEPLERorBetter(pGpu)        (0 && (pGpu))
568 
569 
570 // Any KEPLER_TEGRA_BIG_GPUS chip?
571 #define IsKEPLER_TEGRA_BIG_GPUS(pGpu)  (0 && (pGpu))
572 #define IsKEPLER_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
573 
574 
575 // Any tMAXWELL chip?
576 #define IstMAXWELL(pGpu)               (0 && (pGpu))
577 #define IstMAXWELLorBetter(pGpu)       (0 && (pGpu))
578 
579 
580 // Any MAXWELL_TEGRA_BIG_GPUS chip?
581 #define IsMAXWELL_TEGRA_BIG_GPUS(pGpu) (0 && (pGpu))
582 #define IsMAXWELL_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
583 
584 
585 // Any tPASCAL chip?
586 #define IstPASCAL(pGpu)                (0 && (pGpu))
587 #define IstPASCALorBetter(pGpu)        (0 && (pGpu))
588 
589 
590 // Any PASCAL_TEGRA_BIG_GPUS chip?
591 #define IsPASCAL_TEGRA_BIG_GPUS(pGpu)  (0 && (pGpu))
592 #define IsPASCAL_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
593 
594 
595 // Any tVOLTA chip?
596 #define IstVOLTA(pGpu)                 (0 && (pGpu))
597 #define IstVOLTAorBetter(pGpu)         (0 && (pGpu))
598 
599 
600 // Any VOLTA_TEGRA_BIG_GPUS chip?
601 #define IsVOLTA_TEGRA_BIG_GPUS(pGpu)   (0 && (pGpu))
602 #define IsVOLTA_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
603 
604 
605 // Any TEGRA_DISP_TEGRA_BIG_GPUS chip?
606 #define IsTEGRA_DISP_TEGRA_BIG_GPUS(pGpu) (0 && (pGpu))
607 #define IsTEGRA_DISP_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
608 
609 
610 // Any TURING_TEGRA_BIG_GPUS chip?
611 #define IsTURING_TEGRA_BIG_GPUS(pGpu)  (0 && (pGpu))
612 #define IsTURING_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
613 
614 
615 // Any T23X chip?
616 #define IsT23X(pGpu)                   (IsT23X_TEGRA_BIG_GPUS(pGpu) || IsT23X_TEGRA_NVDISP_GPUS(pGpu))
617 #define IsT23XorBetter(pGpu)           (IsT23X_TEGRA_BIG_GPUSorBetter(pGpu) || IsT23X_TEGRA_NVDISP_GPUSorBetter(pGpu))
618 
619 
620 // Any T23X_TEGRA_BIG_GPUS chip?
621 #define IsT23X_TEGRA_BIG_GPUS(pGpu)    (0 && (pGpu))
622 #define IsT23X_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
623 
624 
625 // Any tAMPERE chip?
626 #define IstAMPERE(pGpu)                (0 && (pGpu))
627 #define IstAMPEREorBetter(pGpu)        (0 && (pGpu))
628 
629 
630 // Any AMPERE_TEGRA_BIG_GPUS chip?
631 #define IsAMPERE_TEGRA_BIG_GPUS(pGpu)  (0 && (pGpu))
632 #define IsAMPERE_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
633 
634 
635 // Any ADA_TEGRA_BIG_GPUS chip?
636 #define IsADA_TEGRA_BIG_GPUS(pGpu)     (0 && (pGpu))
637 #define IsADA_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
638 
639 
640 // Any HOPPER_TEGRA_BIG_GPUS chip?
641 #define IsHOPPER_TEGRA_BIG_GPUS(pGpu)  (0 && (pGpu))
642 #define IsHOPPER_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu))
643 
644 
645 // Any TEGRA_NVDISP_GPUS chip?
646 #define IsTEGRA_NVDISP_GPUS(pGpu)      (0 && (pGpu))
647 #define IsTEGRA_NVDISP_GPUSorBetter(pGpu) (0 && (pGpu))
648 
649 
650 // Any T23X_TEGRA_NVDISP_GPUS chip?
651 #define IsT23X_TEGRA_NVDISP_GPUS(pGpu) (0 && (pGpu))
652 #define IsT23X_TEGRA_NVDISP_GPUSorBetter(pGpu) (0 && (pGpu))
653 
654 
655 // Any TEGRA_TEGRA_NVDISP_GPUS chip?
656 #define IsTEGRA_TEGRA_NVDISP_GPUS(pGpu) (0 && (pGpu))
657 #define IsTEGRA_TEGRA_NVDISP_GPUSorBetter(pGpu) (0 && (pGpu))
658 
659 
660 // Any TEGRA_DISP_TEGRA_NVDISP_GPUS chip?
661 #define IsTEGRA_DISP_TEGRA_NVDISP_GPUS(pGpu) (0 && (pGpu))
662 #define IsTEGRA_DISP_TEGRA_NVDISP_GPUSorBetter(pGpu) (0 && (pGpu))
663 
664 
665 // Any SIMULATION_GPUS chip?
666 #define IsSIMULATION_GPUS(pGpu)        (0 && (pGpu))
667 #define IsSIMULATION_GPUSorBetter(pGpu) (0 && (pGpu))
668 
669 
670 
671 
672 
673 //
674 // Enable/disable printing of entity names (class, engine, etc.)
675 //
676 #define RMCFG_ENTITY_NAME(entity) ""
677 
678 //
679 // Macros to help with enabling or disabling code based on whether
680 // a feature (or chip or engine or ...) is enabled or not.
681 // Also have RMCFG_CHIP_), RMCFG_FEATURE_ENABLED(, etc
682 // from rmconfig.h.
683 //
684 // NOTE: these definitions are "flat" (ie they don't use some more general
685 //       RMCFG_ENABLED(CHIP,X) form because the pre-processor would re-evaluate
686 //       the expansion of the item (chip, feature, class, api).  For classes,
687 //       at least, this is a problem since we would end up with class number
688 //       instead of its name...
689 
690 // hack: MSVC is not C99 compliant
691 
692 // CHIP's
693 #define RMCFG_CHIP_ENABLED_OR_BAIL(W)                \
694      do {                                           \
695          if ( ! RMCFG_CHIP_##W)                      \
696          {                                          \
697              NV_PRINTF(LEVEL_ERROR, "CHIP" RMCFG_ENTITY_NAME(#W) " not enabled, bailing\n"); \
698              return NV_ERR_NOT_SUPPORTED;           \
699           }                                          \
700       } while(0)
701  #define RMCFG_CHIP_ENABLED_OR_ASSERT_AND_BAIL(W)     \
702       do {                                           \
703           if ( ! RMCFG_CHIP_##W)                      \
704           {                                          \
705               NV_PRINTF(LEVEL_ERROR, "CHIP" RMCFG_ENTITY_NAME(#W) " not enabled, assert and bail\n"); \
706              NV_ASSERT_PRECOMP(RMCFG_CHIP_##W);              \
707              return NV_ERR_NOT_SUPPORTED;           \
708          }                                          \
709      } while(0)
710 
711 // FEATURE's
712 #define RMCFG_FEATURE_ENABLED_OR_BAIL(W)            \
713      do {                                           \
714          if ( ! RMCFG_FEATURE_##W)                  \
715          {                                          \
716              NV_PRINTF(LEVEL_ERROR, "FEATURE" RMCFG_ENTITY_NAME(#W) " not enabled, bailing\n"); \
717              return NV_ERR_NOT_SUPPORTED;           \
718          }                                          \
719      } while(0)
720 #define RMCFG_FEATURE_ENABLED_OR_ASSERT_AND_BAIL(W) \
721      do {                                           \
722          if ( ! RMCFG_FEATURE_##W)                  \
723          {                                          \
724              NV_PRINTF(LEVEL_ERROR, "FEATURE" RMCFG_ENTITY_NAME(#W) " not enabled, assert and bail\n"); \
725              NV_ASSERT_PRECOMP(RMCFG_FEATURE_##W);          \
726              return NV_ERR_NOT_SUPPORTED;           \
727          }                                          \
728      } while(0)
729 
730 #define RMCFG_FEATURE_PLATFORM_P (RMCFG_FEATURE_PLATFORM_##P)
731 
732 // MODULE's
733 #define RMCFG_MODULE_ENABLED_OR_BAIL(W)             \
734               do {                                           \
735                   if ( ! RMCFG_MODULE_##W)                   \
736                   {                                          \
737                       NV_PRINTF(LEVEL_ERROR, "MODULE" RMCFG_ENTITY_NAME(#W) " not enabled, bailing\n"); \
738                       return NV_ERR_NOT_SUPPORTED;           \
739                   }                                          \
740               } while(0)
741 #define RMCFG_MODULE_ENABLED_OR_ASSERT_AND_BAIL(W)  \
742               do {                                           \
743                   if ( ! RMCFG_MODULE_##W)                   \
744                   {                                          \
745                       NV_PRINTF(LEVEL_ERROR, "MODULE" RMCFG_ENTITY_NAME(#W) " not enabled, assert and bail\n"); \
746                       NV_ASSERT_PRECOMP(RMCFG_MODULE_##W);           \
747                       return NV_ERR_NOT_SUPPORTED;           \
748                   }                                          \
749               } while(0)
750 
751 
752 // CLASS's
753 #define RMCFG_CLASS_ENABLED_OR_BAIL(W)              \
754      do {                                           \
755          if ( ! RMCFG_CLASS_##W)                    \
756          {                                          \
757              NV_PRINTF(LEVEL_ERROR, "CLASS" RMCFG_ENTITY_NAME(#W) " not enabled, bailing\n"); \
758              return NV_ERR_NOT_SUPPORTED;           \
759          }                                          \
760      } while(0)
761 #define RMCFG_CLASS_ENABLED_OR_ASSERT_AND_BAIL(W)   \
762      do {                                           \
763          if ( ! RMCFG_CLASS_##W)                    \
764          {                                          \
765              NV_PRINTF(LEVEL_ERROR, "CLASS" RMCFG_ENTITY_NAME(#W) " not enabled, assert and bail\n"); \
766              NV_ASSERT_PRECOMP(RMCFG_CLASS_##W);            \
767              return NV_ERR_NOT_SUPPORTED;           \
768          }                                          \
769      } while(0)
770 
771 // API's
772 #define RMCFG_API_ENABLED_OR_BAIL(W)                \
773      do {                                           \
774          if ( ! RMCFG_API_##W)                      \
775          {                                          \
776              NV_PRINTF(LEVEL_ERROR, "API" RMCFG_ENTITY_NAME(#W) " not enabled, bailing\n"); \
777              return NV_ERR_NOT_SUPPORTED;           \
778          }                                          \
779      } while(0)
780 #define RMCFG_API_ENABLED_OR_ASSERT_AND_BAIL(W)     \
781      do {                                           \
782          if ( ! RMCFG_API_##W)                      \
783          {                                          \
784              NV_PRINTF(LEVEL_ERROR, "API" RMCFG_ENTITY_NAME(#W) " not enabled, assert and bail\n"); \
785              NV_ASSERT_PRECOMP(RMCFG_API_##W);              \
786              return NV_ERR_NOT_SUPPORTED;           \
787          }                                          \
788      } while(0)
789 
790 
791 
792 #endif  // _G_RMCFG_PRIVATE_H_
793