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Searched refs:field (Results 1 – 12 of 12) sorted by relevance

/open-nvidia-gpu/src/nvidia/inc/kernel/rmapi/
H A Dcontrol.h97 … RMCTRL_GET_CAP(tbl,cap,field) (((NvU8)tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1… argument
98 …ine RMCTRL_SET_CAP(tbl,cap,field) ((tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?ca… argument
99 …e RMCTRL_CLEAR_CAP(tbl,cap,field) ((tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap#… argument
102 #define RMCTRL_AND_CAP(finaltbl,tmptbl,tmp,cap,field) … argument
103 …l[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)] & tmptbl[((1?cap##field)>=cap##_TBL_SIZ…
104 …finaltbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)] &= ~(0?cap##field); …
105 finaltbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)] |= tmp;
107 #define RMCTRL_OR_CAP(finaltbl,tmptbl,tmp,cap,field) … argument
108 …l[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)] | tmptbl[((1?cap##field)>=cap##_TBL_SIZ…
109 …finaltbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)] &= ~(0?cap##field); …
[all …]
/open-nvidia-gpu/src/nvidia/inc/kernel/gpu/
H A Dgpu_shared_data_map.h62 #define gpushareddataWriteStart(pGpu, field) \ argument
63 &(gpushareddataWriteStart_INTERNAL(pGpu, NV_OFFSETOF(NV00DE_SHARED_DATA, field))->field)
70 #define gpushareddataWriteFinish(pGpu, field) \ argument
71 gpushareddataWriteFinish_INTERNAL(pGpu, NV_OFFSETOF(NV00DE_SHARED_DATA, field))
/open-nvidia-gpu/src/nvidia/src/kernel/platform/
H A Dcpu.c68 NvU32 val, field, numsets, assoc, linesize; in DecodeAarch64Cache() local
76 field = GET_BITMASK(CCSIDR_CACHE_NUM_SETS, val); in DecodeAarch64Cache()
77 numsets = field + 1; in DecodeAarch64Cache()
78 field = GET_BITMASK(CCSIDR_CACHE_ASSOCIATIVITY, val); in DecodeAarch64Cache()
79 assoc = field + 1; in DecodeAarch64Cache()
80 field = GET_BITMASK(CCSIDR_CACHE_LINE_SIZE, val); in DecodeAarch64Cache()
81 linesize = 1 << (field + 4); in DecodeAarch64Cache()
92 field = GET_BITMASK(CCSIDR_CACHE_NUM_SETS, val); in DecodeAarch64Cache()
93 numsets = field + 1; in DecodeAarch64Cache()
94 field in DecodeAarch64Cache()
256 NvU32 val, field; DecodeCortexA9Cache() local
300 DecodeCortexA15CacheSize(NvU32 field) DecodeCortexA15CacheSize() argument
322 NvU32 val, field; DecodeCortexA15Cache() local
391 NvU32 field; RmInitCpuInfo() local
[all...]
/open-nvidia-gpu/src/common/nvswitch/kernel/inforom/
H A Dinforom_nvswitch.c116 NvU64 field = 0; in _nvswitch_inforom_unpack_uint_field() local
130 **ppObject = (NvU32)field; in _nvswitch_inforom_unpack_uint_field()
135 **(NvU64 **)ppObject = field; in _nvswitch_inforom_unpack_uint_field()
150 NvU64 field; in _nvswitch_inforom_unpack_object() local
168 field = *pPackedObject++; in _nvswitch_inforom_unpack_object()
169 field |= ((field & 0x80) ? ~0xff : 0); in _nvswitch_inforom_unpack_object()
170 *pObject++ = (NvU32)field; in _nvswitch_inforom_unpack_object()
176 field = *pPackedObject++; in _nvswitch_inforom_unpack_object()
253 NvU64 field; in _nvswitch_inforom_pack_object() local
271 field = *pObject++; in _nvswitch_inforom_pack_object()
[all …]
/open-nvidia-gpu/src/nvidia/src/kernel/gpu/arch/blackwell/
H A Dkern_gpu_gb100.c267 #define LOG_SEC_FAULT(field) \ in gpuHandleSecFault_GB100()
268 if (DRF_VAL(_PF0, _DVSEC0_SEC_FAULT_REGISTER_1, field, secDebug) != 0) \ in gpuHandleSecFault_GB100()
270 MODS_ARCH_ERROR_PRINTF("DVSEC0_SEC_FAULT_REGISTER_1" #field "\n"); \ in gpuHandleSecFault_GB100()
271 NV_PRINTF(LEVEL_FATAL, "SEC_FAULT type: " #field "\n"); \ in gpuHandleSecFault_GB100()
273 "SEC_FAULT: " #field ); \ in gpuHandleSecFault_GB100()
232 LOG_SEC_FAULT(field) gpuHandleSecFault_GB100() argument
/open-nvidia-gpu/src/nvidia/src/kernel/gpu/arch/hopper/
H A Dkern_gpu_gh100.c223 #define LOG_SEC_FAULT(field) \ in gpuHandleSecFault_GH100() argument
224 if (DRF_VAL(_EP_PCFG_GPU, _VSEC_DEBUG_SEC, field, secDebug) != 0) \ in gpuHandleSecFault_GH100()
226 MODS_ARCH_ERROR_PRINTF("NV_EP_PCFG_GPU_VSEC_DEBUG_SEC" #field "\n"); \ in gpuHandleSecFault_GH100()
227 NV_PRINTF(LEVEL_FATAL, "SEC_FAULT type: " #field "\n"); \ in gpuHandleSecFault_GH100()
229 "SEC_FAULT: " #field ); \ in gpuHandleSecFault_GH100()
/open-nvidia-gpu/src/common/nvswitch/kernel/inc/
H A Dcommon_nvswitch.h598 …fine NVSWITCH_GET_CAP(tbl,cap,field) (((NvU8)tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##… argument
599 #define NVSWITCH_SET_CAP(tbl,cap,field) ((tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##fiel… argument
/open-nvidia-gpu/src/nvidia/interface/deprecated/
H A Drmapi_deprecated_allocmemory.c432 #define COPY_FIELD(field) allocParams.field = pMemoryList->field in _rmAllocMemoryList() argument
505 #define COPY_FLA_FIELD(field) allocParams.field = pMemoryFla->field in _rmAllocMemoryFromFlaObject() argument
/open-nvidia-gpu/src/nvidia/src/kernel/gpu/mmu/
H A Dgmmu_trace.c35 #define PRINT_FIELD_BOOL(fmt, fmtPte, field, pte) \ argument
37 if (nvFieldIsValid32(&(fmtPte)->fld##field.desc)) \
39 nvFieldGetBool(&(fmtPte)->fld##field, (pte)->v8)); \
42 #define PRINT_FIELD_32(fmt, fmtPte, field, pte) \ argument
44 if (nvFieldIsValid32(&(fmtPte)->fld##field)) \
46 nvFieldGet32(&(fmtPte)->fld##field, (pte)->v8)); \
/open-nvidia-gpu/src/nvidia/generated/
H A Dg_eng_desc_nvoc.h58 #define ENGDESC_FIELD(desc, field) (((desc) >> SF_SHIFT(ENGDESC ## field)) & \ argument
59 SF_MASK(ENGDESC ## field))
/open-nvidia-gpu/src/nvidia-modeset/
H A DMakefile78 CFLAGS += -Wno-missing-field-initializers
/open-nvidia-gpu/kernel-open/nvidia-uvm/
H A Duvm_perf_thrashing.c226 #define PROCESSOR_THRASHING_STATS_INC(va_space, proc, field) … argument
230 … atomic64_inc(&_processor_stats->field); \