Searched refs:pool_type_mask (Results 1 – 2 of 2) sorted by relevance
/open-nvidia-gpu/kernel-open/nvidia-uvm/ |
H A D | uvm_channel.h | 725 uvm_channel_t *uvm_channel_any_of_type(uvm_channel_manager_t *manager, NvU32 pool_type_mask); 740 uvm_channel_pool_t *uvm_channel_pool_first(uvm_channel_manager_t *manager, NvU32 pool_type_mask); 743 NvU32 pool_type_mask); 747 #define uvm_for_each_pool_of_type(pool, manager, pool_type_mask) \ argument 748 for (pool = uvm_channel_pool_first(manager, pool_type_mask); \ 750 pool = uvm_channel_pool_next(manager, pool, pool_type_mask))
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H A D | uvm_channel.c | 3811 NvU32 pool_type_mask) in channel_pool_first_from() argument 3818 UVM_ASSERT(pool_type_mask > 0); in channel_pool_first_from() 3819 UVM_ASSERT(pool_type_mask <= UVM_CHANNEL_POOL_TYPE_MASK); in channel_pool_first_from() 3825 if (curr_pool->pool_type & pool_type_mask) in channel_pool_first_from() 3832 uvm_channel_pool_t *uvm_channel_pool_first(uvm_channel_manager_t *manager, NvU32 pool_type_mask) in uvm_channel_pool_first() argument 3834 return channel_pool_first_from(manager, manager->channel_pools, pool_type_mask); in uvm_channel_pool_first() 3839 NvU32 pool_type_mask) in uvm_channel_pool_next() argument 3841 return channel_pool_first_from(manager, pool + 1, pool_type_mask); in uvm_channel_pool_next() 3844 uvm_channel_t *uvm_channel_any_of_type(uvm_channel_manager_t *manager, NvU32 pool_type_mask) in uvm_channel_any_of_type() argument 3846 uvm_channel_pool_t *pool = uvm_channel_pool_first(manager, pool_type_mask); in uvm_channel_any_of_type()
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