Searched refs:AMDGPU_MAX_RINGS (Results 1 – 11 of 11) sorted by relevance
618 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_fini()650 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_isr_toggle()668 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_sw_fini()707 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_init()925 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_fence_info_show()
366 unsigned seqno[AMDGPU_MAX_RINGS];377 struct drm_gpu_scheduler *vm_pte_scheds[AMDGPU_MAX_RINGS];
1671 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1687 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1907 if (val >= AMDGPU_MAX_RINGS) in amdgpu_debugfs_ib_preempt()2155 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_init()
2285 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_init_schedulers()3599 adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()4780 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_has_job_running()4922 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_pre_asic_reset()5478 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()5553 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()5882 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_error_detected()6017 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_resume()
40 #define AMDGPU_MAX_RINGS 124 macro
219 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()
140 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in aqua_vanjaram_xcp_sched_list_update()
2503 dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_vm_manager_init()2504 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_vm_manager_init()
929 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
2589 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_pmops_runtime_suspend()
503 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_dpm_compute_clocks()