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Searched refs:AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h12133 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_10_0_sh_mask.h13391 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_11_0_sh_mask.h13397 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_11_2_sh_mask.h14013 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_12_0_sh_mask.h6985 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h5767 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_1_0_sh_mask.h8120 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h7525 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h7506 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h5165 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h8061 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h5990 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h15649 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h8720 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h7335 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h7793 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h7439 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h5163 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE_MASK … macro