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Searched refs:AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h12134 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h13392 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h13398 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h14014 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h6984 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h5766 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_1_0_sh_mask.h8119 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h7524 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h7505 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h5164 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h8060 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h5989 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h15648 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h8719 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h7334 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h7792 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h7438 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h5162 #define AZALIA_CRC0_CONTROL1__CRC_BLOCK_SIZE__SHIFT … macro