Home
last modified time | relevance | path

Searched refs:AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h32524 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_1_0_sh_mask.h51537 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h53831 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h50552 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h53773 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h57954 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h59034 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h4593 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h59881 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h59573 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h65224 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h68151 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h53775 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h60609 #define AZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5__DESCRIPTION7__SHIFT … macro