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Searched refs:AddrIndexReg (Results 1 – 19 of 19) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86InsertPrefetch.cpp84 Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg(); in IsMemOpCompatibleWithPrefetch()
219 X86::AddrIndexReg == 2 && X86::AddrDisp == 3 && in runOnMachineFunction()
230 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg()) in runOnMachineFunction()
H A DX86FixupLEAs.cpp463 Register IndexReg = LeaI->getOperand(1 + X86::AddrIndexReg).getReg(); in checkRegUsage()
515 Register IndexReg = I->getOperand(1 + X86::AddrIndexReg).getReg(); in optLEAALU()
563 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in optTwoAddrLEA()
668 MachineOperand &q = MI.getOperand(AddrOffset + X86::AddrIndexReg); in processInstruction()
703 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstructionForSlowLEA()
755 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstrForSlow3OpLEA()
H A DX86AsmPrinter.cpp376 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintLeaMemReference()
416 PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier); in PrintLeaMemReference()
473 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintIntelMemReference()
507 PrintOperand(MI, OpNo + X86::AddrIndexReg, O); in PrintIntelMemReference()
H A DX86OptimizeLEAs.cpp196 &MI.getOperand(N + X86::AddrIndexReg), in getMemOpKey()
561 MI.getOperand(MemOpNo + X86::AddrIndexReg) in removeRedundantAddrCalc()
H A DX86FixupGadgets.cpp160 const MachineOperand &Index = MI.getOperand(CurOp + X86::AddrIndexReg); in checkSIB()
170 info.op2 = CurOp + X86::AddrIndexReg; in checkSIB()
H A DX86CallFrameOptimization.cpp431 (I->getOperand(X86::AddrIndexReg).getReg() != X86::NoRegister) || in collectCallInfo()
H A DX86SpeculativeLoadHardening.cpp1339 MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in tracePredStateThroughBlocksAndHarden()
1413 MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in tracePredStateThroughBlocksAndHarden()
1815 UseMI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in sinkPostLoadHardenedInst()
H A DX86InstrInfo.h124 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isLeaMem()
H A DX86AvoidStoreForwardingBlocks.cpp317 const MachineOperand &Index = MI->getOperand(AddrOffset + X86::AddrIndexReg); in isRelevantAddressingMode()
H A DX86LoadValueInjectionLoadHardening.cpp788 MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in instrUsesRegToAccessMemory()
H A DX86InstrInfo.cpp457 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isFrameOperand()
460 MI.getOperand(Op + X86::AddrIndexReg).getReg() == 0 && in isFrameOperand()
870 MI.getOperand(1 + X86::AddrIndexReg).isReg() && in isReallyTriviallyReMaterializable()
871 MI.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isReallyTriviallyReMaterializable()
889 MI.getOperand(1 + X86::AddrIndexReg).isReg() && in isReallyTriviallyReMaterializable()
890 MI.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isReallyTriviallyReMaterializable()
3752 AM.ScaledReg = MemI.getOperand(MemRefBegin + X86::AddrIndexReg).getReg(); in getAddrModeFromMemoryOp()
3846 if (MemOp.getOperand(MemRefBegin + X86::AddrIndexReg).getReg() != in getMemOperandsWithOffsetWidth()
3909 MachineOperand &MO = NewMI->getOperand(X86::AddrIndexReg); in loadStoreTileReg()
3921 MachineOperand &MO = NewMI->getOperand(1 + X86::AddrIndexReg); in loadStoreTileReg()
[all …]
H A DX86MCInstLower.cpp390 Inst.getOperand(AddrBase + X86::AddrIndexReg).isReg() && in SimplifyShortMoveForm()
414 Inst.getOperand(AddrBase + X86::AddrIndexReg).getReg() != 0)) in SimplifyShortMoveForm()
H A DX86FastISel.cpp219 X86::AddrIndexReg); in addFullAddress()
/openbsd/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp330 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in emitMemModRMByte()
809 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
835 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
882 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
898 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
915 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
942 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
1192 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X in emitREXPrefix()
1201 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X in emitREXPrefix()
1216 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X in emitREXPrefix()
H A DX86MCTargetDesc.cpp79 const MCOperand &Index = MI.getOperand(Op + X86::AddrIndexReg); in isMemOperand()
89 const MCOperand &Index = MI.getOperand(Op + X86::AddrIndexReg); in is16BitMemOperand()
99 const MCOperand &Index = MI.getOperand(Op + X86::AddrIndexReg); in is32BitMemOperand()
651 const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg); in evaluateMemoryOperandAddress()
677 const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg); in getMemoryOperandRelocationOffset()
H A DX86ATTInstPrinter.cpp427 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); in printMemReference()
451 printOperand(MI, Op + X86::AddrIndexReg, O); in printMemReference()
H A DX86IntelInstPrinter.cpp385 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printMemReference()
403 printOperand(MI, Op+X86::AddrIndexReg, O); in printMemReference()
H A DX86BaseInfo.h34 AddrIndexReg = 2, enumerator
/openbsd/gnu/llvm/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp3885 Inst.getOperand(4 + X86::AddrIndexReg).getReg()); in validateInstruction()
3893 Inst.getOperand(3 + X86::AddrIndexReg).getReg()); in validateInstruction()