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Searched refs:BASE_INNER (Results 1 – 25 of 59) sorted by relevance

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/openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c45 #ifdef BASE_INNER
46 #undef BASE_INNER
49 #define BASE_INNER(seg) MP1_BASE__INST0_SEG ## seg macro
51 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c139 #undef BASE_INNER
140 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
142 #define BASE(seg) BASE_INNER(seg)
146 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c50 #undef BASE_INNER
51 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
53 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn21.c49 #undef BASE_INNER
50 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dcn32/
H A Dhw_translate_dcn32.c47 #undef BASE_INNER
48 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
50 #define BASE(seg) BASE_INNER(seg)
H A Dhw_factory_dcn32.c52 #undef BASE_INNER
53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
55 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c56 #undef BASE_INNER
57 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
59 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn315.c49 #undef BASE_INNER
50 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c52 #undef BASE_INNER
53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
55 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn20.c49 #undef BASE_INNER
50 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c61 #undef BASE_INNER
62 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
64 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn30.c56 #undef BASE_INNER
57 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
59 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn303/
H A Dirq_service_dcn303.c108 #undef BASE_INNER
109 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
112 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c53 #define BASE_INNER(seg) \ macro
58 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn20/
H A Dirq_service_dcn20.c192 #undef BASE_INNER
193 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
197 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c50 #define BASE_INNER(seg) \ macro
55 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn302/
H A Dirq_service_dcn302.c181 #undef BASE_INNER
182 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
185 #define BASE(seg) BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn21/
H A Dirq_service_dcn21.c199 #undef BASE_INNER
200 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
204 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn30/
H A Dirq_service_dcn30.c206 #undef BASE_INNER
207 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
211 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn31/
H A Dirq_service_dcn31.c193 #undef BASE_INNER
194 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
198 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn315/
H A Dirq_service_dcn315.c200 #undef BASE_INNER
201 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
205 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn32/
H A Dirq_service_dcn32.c194 #undef BASE_INNER
195 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
199 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn314/
H A Dirq_service_dcn314.c195 #undef BASE_INNER
196 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
200 BASE_INNER(seg)
/openbsd/sys/dev/pci/drm/amd/display/dmub/src/
H A Ddmub_dcn301.c34 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn302.c34 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro

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