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Searched refs:BIF_CFG_DEV0_EPF0_VF0_0_STATUS__DEVSEL_TIMING__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h8592 #define BIF_CFG_DEV0_EPF0_VF0_0_STATUS__DEVSEL_TIMING__SHIFT … macro
31281 #define BIF_CFG_DEV0_EPF0_VF0_0_STATUS__DEVSEL_TIMING__SHIFT … macro
H A Dnbio_4_3_0_sh_mask.h19707 #define BIF_CFG_DEV0_EPF0_VF0_0_STATUS__DEVSEL_TIMING__SHIFT … macro
H A Dnbio_2_3_sh_mask.h57889 #define BIF_CFG_DEV0_EPF0_VF0_0_STATUS__DEVSEL_TIMING__SHIFT … macro
H A Dnbio_6_1_sh_mask.h6221 #define BIF_CFG_DEV0_EPF0_VF0_0_STATUS__DEVSEL_TIMING__SHIFT … macro