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Searched refs:BIF_VDDGFX_RSV4_LOWER__VDDGFX_RSV4_REG_CMP_EN_MASK (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h677 #define BIF_VDDGFX_RSV4_LOWER__VDDGFX_RSV4_REG_CMP_EN_MASK 0x40000000 macro
H A Dbif_5_1_sh_mask.h645 #define BIF_VDDGFX_RSV4_LOWER__VDDGFX_RSV4_REG_CMP_EN_MASK 0x40000000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h118000 #define BIF_VDDGFX_RSV4_LOWER__VDDGFX_RSV4_REG_CMP_EN_MASK … macro
H A Dnbio_6_1_sh_mask.h17724 #define BIF_VDDGFX_RSV4_LOWER__VDDGFX_RSV4_REG_CMP_EN_MASK … macro