Searched refs:CACHE_MODE_0_GEN7 (Results 1 – 6 of 6) sorted by relevance
/openbsd/sys/dev/pci/drm/i915/gvt/ |
H A D | mmio_context.c | 68 {RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */ 100 {RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
|
H A D | handlers.c | 2241 MMIO_DFH(CACHE_MODE_0_GEN7, D_ALL, F_MODE_MASK | F_CMD_ACCESS, in init_generic_mmio_info()
|
/openbsd/sys/dev/pci/drm/i915/gt/ |
H A D | gen7_renderclear.c | 400 batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7)); in emit_batch()
|
H A D | intel_workarounds.c | 382 wa_masked_dis(wal, CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE); in gen8_ctx_workarounds_init() 2599 CACHE_MODE_0_GEN7, in rcs_engine_wa_init() 2640 CACHE_MODE_0_GEN7, in rcs_engine_wa_init() 2671 wa_masked_dis(wal, CACHE_MODE_0_GEN7, RC_OP_FLUSH_ENABLE); in rcs_engine_wa_init()
|
H A D | intel_gt_regs.h | 435 #define CACHE_MODE_0_GEN7 _MMIO(0x7000) /* IVB+ */ macro
|
/openbsd/sys/dev/pci/drm/i915/ |
H A D | intel_gvt_mmio_table.c | 92 MMIO_D(CACHE_MODE_0_GEN7); in iterate_generic_mmio()
|