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Searched refs:CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h28 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x000003f0L macro
H A Dsmu_7_0_0_sh_mask.h111 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_1_sh_mask.h111 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_0_1_sh_mask.h111 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_0_sh_mask.h111 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_2_sh_mask.h111 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_3_sh_mask.h135 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro