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Searched refs:CHV_PLL_DW1 (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_dpll.c1821 vlv_dpio_write(dev_priv, pipe, CHV_PLL_DW1(port), in chv_prepare_pll()
H A Dintel_display.c2835 pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port)); in chv_crtc_clock_get()
/openbsd/sys/dev/pci/drm/i915/
H A Di915_reg.h428 #define CHV_PLL_DW1(ch) _PIPE(ch, _CHV_PLL_DW1_CH0, _CHV_PLL_DW1_CH1) macro