| /openbsd/gnu/llvm/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMDefines.h | 33 #define COND_EQ \ macro
73 case COND_EQ: in ARMCondCodeToString()
115 case COND_EQ: in ARMConditionPassed()
|
| /openbsd/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.h | 42 COND_EQ = 7, // Equal enumerator
75 return M68k::COND_EQ; in GetOppositeBranchCondition()
76 case M68k::COND_EQ: in GetOppositeBranchCondition()
101 case M68k::COND_EQ: in GetCondBranchFromCond()
137 return M68k::COND_EQ; in GetCondFromBranchOpc()
|
| H A D | M68kISelLowering.cpp | 1467 M68k::CondCode Cond = CC == ISD::SETEQ ? M68k::COND_NE : M68k::COND_EQ; in getBitTestCondition()
1526 return M68k::COND_EQ; in TranslateIntegerM68kCC()
1605 return M68k::COND_EQ; in TranslateM68kCC()
1753 if ((M68kCC == M68k::COND_EQ || M68kCC == M68k::COND_NE) && in EmitTest()
1885 case M68k::COND_EQ: in isM68kCCUnsigned()
2084 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2113 if (isAllOnesConstant(Op1) != (CondCode == M68k::COND_EQ)) in LowerSELECT()
2476 M68k::CondCode MxCond = Inverted ? M68k::COND_EQ : M68k::COND_NE; in LowerBRCOND()
|
| H A D | M68kInstrInfo.cpp | 53 return M68k::COND_EQ; in getCondFromBranchOpc()
|
| /openbsd/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 194 case AVRCC::COND_EQ: in getBrCond()
218 return AVRCC::COND_EQ; in getCondFromBranchOpc()
240 case AVRCC::COND_EQ: in getOppositeCondition()
243 return AVRCC::COND_EQ; in getOppositeCondition()
|
| H A D | AVRInstrInfo.h | 32 COND_EQ, //!< Equal enumerator
|
| H A D | AVRISelLowering.cpp | 611 return AVRCC::COND_EQ; in intCCToAVRCC()
|
| /openbsd/gnu/usr.bin/binutils/include/opcode/ |
| H A D | arm.h | 52 #define COND_EQ 0 macro
|
| /openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 80 if (CC == RISCVCC::COND_EQ && Cond[2].getReg() == RISCV::X0 && TBB == &MBB) in guaranteesZeroRegInBlock()
|
| H A D | RISCVISelDAGToDAG.h | 119 return RISCVCC::COND_EQ; in getRISCVCCForIntCC()
|
| H A D | RISCVInstrInfo.h | 31 COND_EQ, enumerator
|
| H A D | RISCVInstrInfo.cpp | 737 return RISCVCC::COND_EQ; in getCondFromBranchOpc()
770 case RISCVCC::COND_EQ: in getBrCond()
789 case RISCVCC::COND_EQ: in getOppositeBranchCondition()
792 return RISCVCC::COND_EQ; in getOppositeBranchCondition()
|
| /openbsd/gnu/usr.bin/binutils-2.17/opcodes/ |
| H A D | xc16x-desc.h | 96 , COND_EQ = 2, COND_NE = 3, COND_ULT = 8, COND_UGE = 9 enumerator
|
| /openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | VOPCInstructions.td | 661 defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
726 defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
744 defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
1002 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
1013 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
1025 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_t16_e64, i16>;
1038 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>;
|
| H A D | AMDGPUInstructions.td | 362 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
|
| H A D | SOPInstructions.td | 1067 def S_CMP_EQ_U32 : SOPC_CMP_32 <"s_cmp_eq_u32", COND_EQ>;
1082 def S_CMP_EQ_U64 : SOPC_CMP_64 <"s_cmp_eq_u64", COND_EQ>;
|
| H A D | R600Instructions.td | 895 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_EQ))]
|
| /openbsd/gnu/llvm/lldb/tools/debugserver/source/MacOSX/arm/ |
| H A D | DNBArchImpl.cpp | 83 #define COND_EQ 0x0 macro
815 case COND_EQ: // (0x0) in ConditionPassed()
|