Home
last modified time | relevance | path

Searched refs:CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1508 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
H A Dgfx_8_0_sh_mask.h1942 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
H A Dgfx_8_1_sh_mask.h2464 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11881 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_9_1_sh_mask.h13311 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_9_2_1_sh_mask.h13089 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_9_4_3_sh_mask.h15092 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_9_4_2_sh_mask.h3287 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_11_0_0_sh_mask.h16322 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_10_1_0_sh_mask.h18865 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_11_0_3_sh_mask.h18565 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro
H A Dgc_10_3_0_sh_mask.h17213 #define CPC_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT macro