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Searched refs:CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h1926 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 0xf macro
H A Dgfx_8_1_sh_mask.h2448 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 0xf macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11872 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h13302 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13080 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h15083 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h3278 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h16313 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h18856 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h18556 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h17204 #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT … macro